
STANDARD PRODUCT
PM8315 TEMUX
DATASHEET
PMC-1981125
ISSUE 7
HIGH DENSITY T1/E1 FRAMER WITH
INTEGRATED VT/TU MAPPER AND M13 MUX
PROPRIETARY AND CONFIDENTIAL
xiii
TABLE 47
- RTSB TIMING......................................................................... 279
TABLE 48
- DS3 TRANSMIT INTERFACE TIMING ................................... 279
TABLE 49
- DS3 RECEIVE INTERFACE TIMING...................................... 283
TABLE 50
- LINE SIDE TELECOM BUS INPUT TIMING (FIGURE 96)..... 285
TABLE 51
- TELECOM BUS OUTPUT TIMING (FIGURE 97 TO
FIGURE 98)............................................................................... 286
TABLE 52
- SBI ADD BUS TIMING (FIGURE 96) ...................................... 288
TABLE 53
- SBI DROP BUS TIMING (FIGURE 97 TO FIGURE 98).......... 289
TABLE 54
- H-MVIP EGRESS TIMING (FIGURE 99) ................................ 292
TABLE 55
- H-MVIP INGRESS TIMING (FIGURE 100)............................. 293
TABLE 56
- XCLK INPUT (FIGURE 101)................................................... 295
TABLE 57
- EGRESS INTERFACE TIMING - CLOCK SLAVE: EFP
ENABLED MODE (FIGURE 102).............................................. 296
TABLE 58
- EGRESS INTERFACE TIMING - CLOCK SLAVE: EXTERNAL
SIGNALING (FIGURE 103)....................................................... 297
TABLE 59
- EGRESS INTERFACE INPUT TIMING - CLOCK MASTER :
NXCHANNEL MODE (FIGURE 104)......................................... 299
TABLE 60
- EGRESS INTERFACE INPUT TIMING - CLOCK MASTER :
CLEAR CHANNEL MODE (FIGURE 104)................................. 300
TABLE 61
- EGRESS INTERFACE INPUT TIMING - CLOCK MASTER :
SERIAL DATA AND HMVIP CCS MODE (FIGURE 104)........... 301
TABLE 62
- EGRESS INTERFACE INPUT TIMING - CLOCK SLAVE : CLEAR
CHANNEL MODE (FIGURE 104).............................................. 302
TABLE 63
- INGRESS INTERFACE TIMING - CLOCK SLAVE MODES
(FIGURE 108) ........................................................................... 303
TABLE 64
- INGRESS INTERFACE TIMING - CLOCK MASTER MODES
(FIGURE 109) ........................................................................... 305
TABLE 65
- TRANSMIT LINE INTERFACE TIMING (FIGURE 110)........... 306