MC68336/376
QUEUED SERIAL MODULE
MOTOROLA
USER’S MANUAL
Rev. 15 Oct 2000
9-9
9.3.2.3 Command RAM
Command RAM is used by the QSPI in master mode. The CPU32 writes one byte of
control information to this segment for each QSPI command to be executed. The QSPI
cannot modify information in command RAM.
Command RAM consists of 16 bytes. Each byte is divided into two fields. The periph-
eral chip-select field enables peripherals for transfer. The command control field
provides transfer options.
A maximum of 16 commands can be in the queue. Queue execution by the QSPI pro-
ceeds from the address in NEWQP through the address in ENDQP (both of these
fields are in SPCR2).
9.3.3 QSPI Pins
The QSPI uses seven pins. These pins can be configured for general-purpose I/O
when not needed for QSPI application.
Table 9-2 shows QSPI input and output pins and their functions.
9.3.4 QSPI Operation
The QSPI uses a dedicated 80-byte block of static RAM accessible by both the QSPI
and the CPU32 to perform queued operations. The RAM is divided into three seg-
ments. There are 16 command bytes, 16 transmit data words, and 16 receive data
words. QSPI RAM is organized so that one byte of command data, one word of trans-
mit data, and one word of receive data correspond to one queue entry, $0–$F.
The CPU32 initiates QSPI operation by setting up a queue of QSPI commands in com-
mand RAM, writing transmit data into transmit RAM, then enabling the QSPI. The
QSPI executes the queued commands, sets a completion flag (SPIF), and then either
interrupts the CPU32 or waits for intervention.
There are four queue pointers. The CPU32 can access three of them through fields in
QSPI registers. The new queue pointer (NEWQP), contained in SPCR2, points to the
first command in the queue. An internal queue pointer points to the command currently
being executed. The completed queue pointer (CPTQP), contained in SPSR, points to
Table 9-2 QSPI Pins
Pin Names
Mnemonics
Mode
Function
Master In Slave Out
MISO
Master
Slave
Serial data input to QSPI
Serial data output from QSPI
Master Out Slave In
MOSI
Master
Slave
Serial data output from QSPI
Serial data input to QSPI
Serial Clock
SCK
Master
Slave
Clock output from QSPI
Clock input to QSPI
Peripheral Chip Selects
PCS[3:1]
Master
Select peripherals
Slave Select
PCS0/
SS
Master
Slave
Selects peripherals
Causes mode fault
Initiates serial transfer