MC68336/376
CENTRAL PROCESSOR UNIT
MOTOROLA
USER’S MANUAL
Rev. 15 Oct 2000
4-23
4.10.7 Background Mode Registers
BDM processing uses three special purpose registers to keep track of program context
during development. A description of each follows.
4.10.7.1 Fault Address Register (FAR)
The FAR contains the address of the faulting bus cycle immediately following a bus or
address error. This address remains available until overwritten by a subsequent bus
cycle. Following a double bus fault, the FAR contains the address of the last bus cycle.
The address of the first fault (if there was one) is not visible to the user.
4.10.7.2 Return Program Counter (RPC)
The RPC points to the location where fetching will commence after transition from
background mode to normal mode. This register should be accessed to change the
Table 4-6 Background Mode Command Summary
Command
Mnemonic
Description
Read D/A Register
RDREG/RAREG
Read the selected address or data register and return the
results via the serial interface.
Write D/A Register
WDREG/WAREG
The data operand is written to the specified address or data
register.
Read System Register
RSREG
The specified system control register is read. All registers that
can be read in supervisor mode can be read in background
mode.
Write System Register
WSREG
The operand data is written into the specified system control
register.
Read Memory Location
READ
Read the sized data at the memory location specified by the
long-word address. The source function code register (SFC)
determines the address space accessed.
Write Memory Location
WRITE
Write the operand data to the memory location specified by the
long-word address. The destination function code (DFC) reg-
ister determines the address space accessed.
Dump Memory Block
DUMP
Used in conjunction with the READ command to dump large
blocks of memory. An initial READ is executed to set up the
starting address of the block and retrieve the first result. Sub-
sequent operands are retrieved with the DUMP command.
Fill Memory Block
FILL
Used in conjunction with the WRITE command to fill large
blocks of memory. An initial WRITE is executed to set up the
starting address of the block and supply the first operand. Sub-
sequent operands are written with the FILL command.
Resume Execution
GO
The pipe is flushed and re-filled before resuming instruction
execution at the current PC.
Patch User Code
CALL
Current program counter is stacked at the location of the cur-
rent stack pointer. Instruction execution begins at user patch
code.
Reset Peripherals
RST
Asserts RESET for 512 clock cycles. The CPU is not reset by
this command. Synonymous with the CPU RESET instruction.
No Operation
NOP
NOP performs no operation and may be used as a null com-
mand.