MC68336/376
QUEUED ANALOG-TO-DIGITAL CONVERTER MODULE
MOTOROLA
USER’S MANUAL
Rev. 15 Oct 2000
8-28
8.12.6.2 Control Register 1 (QACR1)
Control register QACR1 is the mode control register for queue 1. Applications software
defines the operating mode for the queue, and may enable a completion and/or pause
interrupt. The SSE1 bit may be written to one or zero but always reads zero.
8.12.6.3 Control Register 2 (QACR2)
Control register QACR2 is the mode control register for queue 2. Applications software
defines the operating mode for the queue, and may enable a completion and/or pause
interrupt. The SSE2 bit may be written to one or zero but always reads zero.
8.12.6.4 Status Register (QASR)
The status register QASR contains information about the state of each queue and the
current A/D conversion. Except for the four flag bits (CF1, PF1, CF2, and PF2) and the
two trigger overrun bits (TOR1 and TOR2), all of the status register fields contain read-
only data. The four flag bits and the two trigger overrun bits are cleared by writing a
zero to the bit after the bit was previously read as a one.
8.12.7 Conversion Command Word Table
The CCW table is a 40-word long, 10-bit wide RAM, which can be programmed to
request conversions of one or more analog input channels. The entries in the CCW
table are 10-bit conversion command words. The CCW table is written by software and
is not modified by the QADC. Each CCW requests the conversion of an analog chan-
nel to a digital result. The CCW specifies the analog channel number, the input sample
time, and whether the queue is to pause after the current CCW. Refer to D.5.8 Con- The ten implemented bits of the CCW word can be read and written. Unimplemented
bits are read as zeros, and write operations have no effect. Each location in the CCW
table corresponds to a location in the result word table. When a conversion is com-
pleted for a CCW entry, the 10-bit result is written in the corresponding result word
entry.
The beginning of queue 1 is the first location in the CCW table. The first location of
queue 2 is specified by the beginning of queue 2 pointer BQ2 in QACR2. To dedicate
the entire CCW table to queue 1, queue 2 is disabled, and BQ2 is programmed to any
value greater than 39. To dedicate the entire CCW table to queue 2, queue 1 is
disabled, and BQ2 is specified as the first location in the CCW table.
Figure 8-10 illustrates the operation of the queue structure.