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參數(shù)資料
| 型號(hào)： | STM32W108HBU7 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, QCC40 |
| 封裝： | 6 X 6 MM, 0.50 MM PITCH, ROHS COMPLIANT, VFQFPN-40 |
| 文件頁(yè)數(shù)： | 176/198頁(yè) |
| 文件大?。?/td> | 2871K |
| 代理商： | STM32W108HBU7 |
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STM32W108CB, STM32W108HB
Serial interfaces
Doc ID 16252 Rev 3
The UART character frame format is determined by three bits in the SC1_UARTCFG
register:
●
SC1_UART2STP selects the number of stop bits in transmitted characters. (Only one
stop bit is ever required in received characters.) If this bit is clear, characters are
transmitted with one stop bit; if set, characters are transmitted with two stop bits.
●
SC1_UARTPAR controls whether or not received and transmitted characters include a
parity bit. If SC1_UARTPAR is clear, characters do not contain a parity bit, otherwise,
characters do contain a parity bit.
●
SC1_UARTODD specifies whether transmitted and received parity bits contain odd or
even parity. If this bit is clear, the parity bit is even, and if set, the parity bit is odd. Even
parity is the exclusive-or of all of the data bits, and odd parity is the inverse of the even
parity value. SC1_UARTODD has no effect if SC1_UARTPAR is clear.
A UART character frame contains, in sequence:
●
The start bit
●
The least significant data bit
●
The remaining data bits
●
If parity is enabled, the parity bit
●
The stop bit, or bits, if 2 stop bits are selected.
Figure 11 shows the UART character frame format, with optional bits indicated. Depending
on the options chosen for the character frame, the length of a character frame ranges from 9
to 12 bit times.
Note that asynchronous serial data may have arbitrarily long idle periods between
characters. When idle, serial data (TXD or RXD) is held in the high state. Serial data
transitions to the low state in the start bit at the beginning of a character frame.
Figure 11.
UART character frame format
9.6.2
FIFOs
Characters transmitted and received by the UART are buffered in the transmit and receive
FIFOs that are both 4 entries deep (see Figure 12). When software writes a character to the
SC1_DATA register, it is pushed onto the transmit FIFO. Similarly, when software reads from
the SC1_DATA register, the character returned is pulled from the receive FIFO. If the
transmit and receive DMA channels are used, the DMA channels also write to and read from
the transmit and receive FIFOs.
Idle time
Start
Bit
Data
Bit 0
Data
Bit 1
Data
Bit 2
Data
Bit 3
Data
Bit 4
Data
Bit 5
Data
Bit 6
Data
Bit 7
Parity
Bit
Stop
Bit
Stop
Bit
Next
Start Bit
or
IdleTime
UART Character Frame Format
(optional sections are in italics )
TXD
or
RXD
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| STM32WC-RFCKIT | 功能描述:Zigbee/802.15.4開(kāi)發(fā)工具 STM32W Low-Cost RF STM32F103 MCU Kit RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評(píng)估:EM35x 頻率:2.4 GHz 接口類型:USB 工作電源電壓: |
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