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參數(shù)資料
| 型號： | STM32W108HBU7 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, QCC40 |
| 封裝： | 6 X 6 MM, 0.50 MM PITCH, ROHS COMPLIANT, VFQFPN-40 |
| 文件頁數(shù)： | 24/198頁 |
| 文件大小： | 2871K |
| 代理商： | STM32W108HBU7 |
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Description
STM32W108CB, STM32W108HB
Doc ID 16252 Rev 3
1.2
Overview
1.2.1
Functional description
The STM32W108 radio receiver is a low-IF, super-heterodyne receiver. The architecture has
been chosen to optimize co-existence with other devices in the 2.4 GHz band (namely, WIFI
and Bluetooth), and to minimize power consumption. The receiver uses differential signal
paths to reduce sensitivity to noise interference. Following RF amplification, the signal is
downconverted by an image-rejecting mixer, filtered, and then digitized by an ADC.
The radio transmitter uses an efficient architecture in which the data stream directly
modulates the VCO frequency. An integrated power amplifier (PA) provides the output
power. Digital logic controls Tx path and output power calibration. If the STM32W108 is to
be used with an external PA, use the TX_ACTIVE or nTX_ACTIVE signal to control the
timing of the external switching logic.
The integrated 4.8 GHz VCO and loop filter minimize off-chip circuitry. Only a 24 MHz
crystal with its loading capacitors is required to establish the PLL local oscillator signal.
The MAC interfaces the on-chip RAM to the Rx and Tx baseband modules. The MAC
provides hardware-based IEEE 802.15.4 packet-level filtering. It supplies an accurate
symbol time base that minimizes the synchronization effort of the software stack and meets
the protocol timing requirements. In addition, it provides timer and synchronization
assistance for the IEEE 802.15.4 CSMA-CA algorithm.
The STM32W108 integrates an ARM Cortex-M3 microprocessor, revision r1p1. This
industry-leading core provides 32 bit performance and is very power efficient. It has
excellent code density using the ARM Thumb 2 instruction set. The processor can be
operated at 12 MHz or 24 MHz when using the crystal oscillator, or at 6 MHz or 12 MHz
when using the integrated high frequency RC oscillator.
The STM32W108 has 128 kB of flash memory, 8 kB of SRAM on-chip, and the ARM
configurable memory protection unit (MPU).
The STM32W108 contains 24 GPIO pins shared with other peripheral or alternate functions.
Because of flexible routing within the STM32W108, external devices can use the alternate
functions on a variety of different GPIOs. The integrated Serial Controller SC1 can be
configured for SPI (master or slave), TWI (master-only), or UART operation, and the Serial
Controller SC2 can be configured for SPI (master or slave) or TWI (master-only) operation.
The STM32W108 has a general purpose ADC which can sample analog signals from six
GPIO pins in single-ended or differential modes. It can also sample the regulated supply
VDD_PADSA, the voltage reference VREF, and GND. The ADC has two selectable voltage
ranges: 0 V to 1.2 V (normal) and 0.1 V to 0.1 V below the high voltage supply (high). The
ADC has a DMA mode to capture samples and automatically transfer them into RAM. The
integrated voltage reference for the ADC, VREF, can be made available to external circuitry.
An external voltage reference can also be driven into the ADC.
The STM32W108 contains four oscillators: a high frequency 24 MHz external crystal
oscillator, a high frequency 12 MHz internal RC oscillator, an optional low frequency 32.768
kHz external crystal oscillator, and a 10 kHz internal RC oscillator.
The STM32W108 has an ultra low power, deep sleep state with a choice of clocking modes.
The sleep timer can be clocked with either the external 32.768 kHz crystal oscillator or with
a 1 kHz clock derived from the internal 10 kHz RC oscillator. Alternatively, all clocks can be
disabled for the lowest power mode. In the lowest power mode, only external events on
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