
General-purpose timers
STM32W108CB, STM32W108HB
Doc ID 16252 Rev 3
filtered and not inverted.) The sequence of transitions of the two inputs is evaluated, and
generates count pulses as well as the direction signal. Depending on the sequence, the
counter counts up or down, and hardware modifies the TIM_DIR bit in the TIMx_CR1
register accordingly. The TIM_DIR bit is calculated at each transition on any input (TI1 or
TI2), whether the counter is counting on TI1 only, TI2 only, or both TI1 and TI2.
Encoder interface mode acts simply as an external clock with direction selection. This
means that the counter just counts continuously between 0 and the auto-reload value in the
TIMx_ARR register (0 to TIMx_ARR or TIMx_ARR down to 0 depending on the direction),
so TIMx_ARR must be configured before starting. In the same way, the capture, compare,
prescaler, and trigger output features continue to work as normal.
In this mode the counter is modified automatically following the speed and the direction of
the incremental encoder, and therefore its contents always represent the encoder's position.
The count direction corresponds to the rotation direction of the connected sensor.
Table 25summarizes the possible combinations, assuming TI1 and TI2 do not switch at the same
time.
An external incremental encoder can be connected directly to the MCU without external
interface logic. However, comparators are normally used to convert an encoder's differential
outputs to digital signals, and this greatly increases noise immunity. If a third encoder output
indicates the mechanical zero (or index) position, it may be connected to an external
interrupt input and can trigger a counter reset.
Figure 38 gives an example of counter operation, showing count signal generation and
direction control. It also shows how input jitter is compensated for when both inputs are used
for counting. This might occur if the sensor is positioned near one of the switching points.
This example assumes the following configuration:
●
TIM_CC1S = 01 (TIMx_CCMR1 register, IC1FP1 mapped on TI1).
●
TIM_CC2S = 01 (TIMx_CCMR2 register, IC2FP2 mapped on TI2).
●
TIM_CC1P = 0 (TIMx_CCER register, IC1FP1 non-inverted, IC1FP1 = TI1).
●
TIM_CC2P = 0 (TIMx_CCER register, IC2FP2 non-inverted, IC2FP2 = TI2).
●
TIM_SMS = 011 (TIMx_SMCR register, both inputs are active on both rising and falling
edges).
●
TIM_CEN = 1 (TIMx_CR1 register, counter is enabled).
Table 25.
Counting direction versus encoder signals
Active
edges
Level on opposite
signal (TI1FP1 for
TI2, TI2FP2 for
TI1)
TI1FP1 signal
TI2FP2 signal
Rising
Falling
Rising
Falling
Counting on
TI1 only
High
Down
Up
No Count
Low
Up
Down
No Count
Counting on
TI2 only
High
No Count
Up
Down
Low
No Count
Down
Up
Counting on
TI1 and TI2
High
Down
Up
Down
Low
Up
Down
Up