參數(shù)資料
型號: T431616D-5S
廠商: Electronic Theatre Controls, Inc.
英文描述: 1M x 16 SDRAM 512K x 16bit x 2Banks Synchronous DRAM
中文描述: 100萬× 16內(nèi)存為512k × 16Bit的X 2Banks同步DRAM
文件頁數(shù): 45/74頁
文件大?。?/td> 781K
代理商: T431616D-5S
TE
CH
tm
T431616D/E
TM Technology Inc. reserves the right
P. 5
Publication Date: FEB. 2007
to change products or specifications without notice.
Revision: A
Operation Mode
Fully synchronous operations are performed to latch the commands at the positive edges of CLK. Table 2 shows the
truth table for the operation commands.
Table 2. Truth Table (Note (1), (2) )
Command
State
CKEn-1 CKEn DQM(6) A11 A10 A0-9 CS# RAS# CAS# WE#
BankActivate
Idle(3)
H
X
V
L
H
BankPrecharge
Any
H
X
V
L
X
L
H
L
PrechargeAll
Any
H
X
H
X
L
H
L
Write
Active(3)
H
X
V
L
V
L
H
L
Write and AutoPrecharge
Active(3)
H
X
V
H
V
L
H
L
Read
Active(3)
H
X
V
L
V
L
H
L
H
Read and Autoprecharge
Active(3)
H
X
V
H
V
L
H
L
H
Mode Register Set
Idle
H
X
V
L
No-Operation
Any
H
X
L
H
Burst Stop
Active(4)
H
X
L
H
L
Device Deselect
Any
H
X
H
X
AutoRefresh
Idle
H
X
L
H
SelfRefresh Entry
Idle
H
L
X
L
H
SelfRefresh Exit
Idle
L
H
X
H
X
(SelfRefresh)
L
H
Clock Suspend Mode Entry
Active
H
L
X
Power Down Mode Entry
Any(5)
H
L
X
H
X
L
H
Clock Suspend Mode Exit
Active
L
H
X
Power Down Mode Exit
Any
L
H
X
H
X
(PowerDown)
L
H
Data Write/Output Enable
Active
H
X
L
X
Data Mask/Output Disable
Active
H
X
H
X
Note:
1. V=Valid X=Don't Care L=Low level H=High level
2. CKEn signal is input level when commands are provided.
CKEn-1 signal is input level one clock cycle before the commands are provided.
3. These are states of bank designated by BS signal.
4. Device state is 1, 2, 4, 8, and full page burst operation.
5. Power Down Mode can not enter in the burst operation.
When this command is asserted in the burst cycle, device state is clock suspend mode.
6. LDQM and UDQM
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