參數(shù)資料
型號: T7121-EL2
英文描述: T7121 HDLC Interface for ISDN
中文描述: T7121的HDLC接口用于ISDN
文件頁數(shù): 18/68頁
文件大小: 685K
代理商: T7121-EL2
18
Lucent Technologies Inc.
Data Sheet
April 1997
T7121 HDLC Interface for ISDN (HIFI-64)
Functional Description
(continued)
5-5035
Note: abcdefgh are not the same as ABCDEFGH due to HDLC processing.
Figure 9. 16 kbits/s Operation, MSB First
a b c d e f g h
HDLC
3 3 3 3 3 3* H G
TRANSMIT FIFO
TRANSMITTER HDLC
PROCESSES LSB FIRST
FIRST BIT
TRANSMITTED
TIME-SLOT DATA
MSB
BIT 7
LSB
BIT 0
DIRECTION OF TRANSMISSION
TLBIT = 0
(TRANSMIT MSB FIRST)
a b c d e f g h
HDLC
RECEIVE FIFO
RECEIVER HDLC
EXPECTS LSB FIRST
MSB
BIT 7
LSB
BIT 0
DIRECTION OF RECEPTION
11000000
TBM7
TBM0
G
H
E
F
C
D
A
B
(R13) TRANSMITTER BIT MASK
3 3 3 3 3 3 F E
3 3 3 3 3 3 D C
3 3 3 3 3 3 B A
*3 = 3-STATE.
1ST TIME SLOT
2ND TIME SLOT
3RD TIME SLOT
4TH TIME SLOT
G H X X X X X X*
FIRST BIT RECEIVED
TIME-SLOT DATA
11000000
RBM7
RBM0
H
G
F
E
D
C
B
A
(R12) RECEIVER BIT MASK
E F X X X X X X
C D X X X X X X
A B X X X X X X
*X = DON'T CARE. THESE BITS
ARE IGNORED BY THE RECEIVER.
1ST TIME SLOT
2ND TIME SLOT
3RD TIME SLOT
4TH TIME SLOT
RLBIT = 0
(RECEIVE MSB FIRST)
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