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參數(shù)資料
| 型號(hào)： | T7121-EL2 |
| 英文描述： | T7121 HDLC Interface for ISDN |
| 中文描述： | T7121的HDLC接口用于ISDN |
| 文件頁(yè)數(shù)： | 30/68頁(yè) |
| 文件大?。?/td> | 685K |
| 代理商： | T7121-EL2 |
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30
Lucent Technologies Inc.
Data Sheet
April 1997
T7121 HDLC Interface for ISDN (HIFI-64)
Functional Description
(continued)
* Numbers in parentheses indicate the value of each bit upon being reset.
Table 7. Register R0—Chip Configuration Register
R0—B7
HWYEN
(0)*
R0—B6
FSPOL
(1)
R0—B5
FE
(0)
R0—B4
ALT
(0)
R0—B3
BM
(0)
R0—B2
FLAGS
(0)
R0—B1
IPOL
(0)
R0—B0
DINT
(0)
Register
R0
Bit
B0
Symbol
DINT
Name/Function
Dynamic Interrupt.
When this bit is 0, the interrupt bits in the interrupt
status register (R15) are cleared by a read of R15. The condition causing
the interrupt must go away and occur again in order for this interrupt to
reassert. Setting this bit to 1 causes the RF and TE bits in R15 and the
INT pin to behave dynamically. See register 15 for more details.
Interrupt Polarity.
Setting this bit to 1 specifies that the hardware INT sig-
nal (pin 15) is active-high. If this bit is 0, the INT signal is active-low.
Flags.
This bit specifies whether the flag pattern (01111110) or the idle
pattern (11111111) is transmitted in the absence of transmit data. When
this bit is cleared to 0, idles are sent, and when this bit is set to 1, flags are
sent. This bit is active only in HDLC mode.
Block Move.
Setting this bit to 1 allows block moves to both the transmit
and receive FIFOs. The block-move feature is available only with the mul-
tiplexed address/data bus since it depends on the AD6 pin.
Alternate.
Registers 11 through 13 have alternate meanings depending
on the value of this bit. The alternate registers (AR11—AR13) are
accessed by setting this bit to 1. All subsequent addressing of registers 11
through 13 then refers to the alternate registers (AR11—AR13). Returning
to registers (R11—R13) is accomplished by clearing this bit to 0.
Frame Edge.
When this bit is set to 1, the frame-synchronization strobe
(FS) is sampled on the positive-going edge of the bit clock (CLKX). When
this bit is cleared to 0, FS is sampled on the negative-going edge of
CLKX.
Frame-Sync Polarity.
When this bit is set to 1, the rising edge of FS indi-
cates the beginning of a frame. When this bit is cleared to 0, the negative
edge of FS indicates the beginning of a frame.
HWYEN
TDM Highway Enable.
Setting this bit to 1 allows the HIFI-64 to commu-
nicate with a TDM bus or highway. When this bit is cleared to 0, the time-
slot features are turned off, and the HIFI-64 receive and transmit opera-
tions are controlled by the CLKX and CLKR inputs.
R0
B1
IPOL
R0
B2
FLAGS
R0
B3
BM
R0
B4
ALT
R0
B5
FE
R0
B6
FSPOL
R0
B7
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| T7-121F1 | 功能描述:撥動(dòng)開關(guān) ON OFF ON 1 Pole Standard Bat Handle RoHS:否 制造商:OTTO 觸點(diǎn)形式: 開關(guān)功能: 電流額定值: 電壓額定值 AC: 電壓額定值 DC: 功率額定值: 端接類型: 安裝風(fēng)格: 端子密封: 觸點(diǎn)電鍍: 照明: |
| T7-121F5 | 功能描述:撥動(dòng)開關(guān) ON OFF ON 1 Pole Standard Bat Handle RoHS:否 制造商:OTTO 觸點(diǎn)形式: 開關(guān)功能: 電流額定值: 電壓額定值 AC: 電壓額定值 DC: 功率額定值: 端接類型: 安裝風(fēng)格: 端子密封: 觸點(diǎn)電鍍: 照明: |
| T7-121G1 | 功能描述:撥動(dòng)開關(guān) (ON) OFF ON 1 Pole Standard Bat Handle RoHS:否 制造商:OTTO 觸點(diǎn)形式: 開關(guān)功能: 電流額定值: 電壓額定值 AC: 電壓額定值 DC: 功率額定值: 端接類型: 安裝風(fēng)格: 端子密封: 觸點(diǎn)電鍍: 照明: |
| T7-121G5 | 功能描述:撥動(dòng)開關(guān) (ON) OFF ON 1 Pole Standard Bat Handle RoHS:否 制造商:OTTO 觸點(diǎn)形式: 開關(guān)功能: 電流額定值: 電壓額定值 AC: 電壓額定值 DC: 功率額定值: 端接類型: 安裝風(fēng)格: 端子密封: 觸點(diǎn)電鍍: 照明: |
| T7-121H1 | 制造商:OTTO 功能描述:Toggle Switches OFF NONE ON 1 Pole Standard Bat Handle 制造商:OTTO Engineering Inc 功能描述:TOGGLE SWITCH 1 POLE |
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