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參數(shù)資料
| 型號： | T7121 |
| 廠商： | Lineage Power |
| 英文描述： | HDLC Interface for ISDN (HIFI-64)(應(yīng)用于ISDN的HDLC（高階數(shù)據(jù)鏈路）接口) |
| 中文描述： | 為ISDN接口的HDLC（高保真- 64）（應(yīng)用于綜合業(yè)務(wù)數(shù)字網(wǎng)的的HDLC（高階數(shù)據(jù)鏈路）接口） |
| 文件頁數(shù)： | 7/68頁 |
| 文件大小： | 685K |
| 代理商： | T7121 |
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Lucent Technologies Inc.
7
Data Sheet
April 1997
T7121 HDLC Interface for ISDN (HIFI-64)
21
CLKR/DRB
I
Receive Clock or Receive Data B.
programming the P21CTL bit in the receiver control register (R5—B6). When
P21CTL is cleared to 0 (default), this pin is the receive data clock (CLKR).
Receive clock frequency must be less than the chip master clock frequency
divided by 2 (fCLKR < fCLK/2). Upon reset, data is received (latched) on the ris-
ing edge of CLKR. Data can be received on the falling edge of the receive clock
by clearing the CLKRI bit in register 9 (R9—B0) to 0. Receive clock rate can be
independent of transmit clock rate.
The functionality of this pin is controlled by
When P21CTL (R5—B6) is set to 1, this pin is configured as Receive Data B
(DRB). Clocking for receive data is obtained from CLKX, while CLKRI (R9—B0)
controls the edge of CLKX used to latch received data. In this mode, data can
be received on DRA or on DRB. DRB is selected by setting the DRA/B bit in reg-
ister 8 (R8—B7) to 1. Data can be optionally inverted (DRI, R11—B7) and
received during a user-selected time slot (registers 8, 9, 11) with bit 0 or bit 7
first (RLBIT R11—B6).
Clock.
This clock controls internal chip operation. It can be from 0 MHz to
12 MHz. Typically it is 6.144 MHz (i.e., SYSCKO from the Lucent T7250C).
Clock frequency must be greater than two times the fastest data clock fre-
quency.
Address Bus.
These four address leads allow the chip to be accessed by a
microprocessor employing separate address and data leads. They are used to
select the internal registers. The ALE pin should be tied high in this mode of
operation.
23
CLK
I
24, 25, 26,
27
A3—A0
I
These pins can be left unconnected when in the multiplexed address/data mode
(internal pull-up resistors are provided).
+5 V Supply.
28
V
DD
—
Table 2. Pin Descriptions
(continued)
Pin
Symbol
Type
Name/Function
Pin Information
(continued)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| T7-121A1 | 制造商:OTTO 功能描述:Toggle Switches ON NONE OFF 1 Pole Standard Bat Handle 制造商:OTTO Engineering Inc 功能描述:Switch Toggle ON None OFF SPST Bat Toggle Screw 16A 115VAC 28VDC Panel Mount with Threads |
| T7-121A2D | 制造商:OTTO 功能描述:Toggle Switches ON NONE OFF 1 Pole Standard LeverLock 制造商:OTTO Engineering Inc 功能描述:1 POLE, SCREW, STD, |
| T7-121A2G | 功能描述:撥動開關(guān) ON NONE OFF 1 Pole Standard LeverLock RoHS:否 制造商:OTTO 觸點形式: 開關(guān)功能: 電流額定值: 電壓額定值 AC: 電壓額定值 DC: 功率額定值: 端接類型: 安裝風(fēng)格: 端子密封: 觸點電鍍: 照明: |
| T7-121A5 | 制造商:OTTO 功能描述:Toggle Switches ON NONE OFF 1 Pole Standard Bat Handle 制造商:OTTO Engineering Inc 功能描述:Switch Toggle ON None OFF SPST Bat Toggle Screw 16A 115VAC 28VDC Panel Mount with Threads |
| T7-121B1 | 功能描述:撥動開關(guān) ON NONE ON 1 Pole Standard Bat Handle RoHS:否 制造商:OTTO 觸點形式: 開關(guān)功能: 電流額定值: 電壓額定值 AC: 電壓額定值 DC: 功率額定值: 端接類型: 安裝風(fēng)格: 端子密封: 觸點電鍍: 照明: |
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