參數(shù)資料
型號(hào)： TMPR4956F
廠商： Toshiba Corporation
英文描述： 64-bit RISC (Reduced Instruction Set Computer) microprocessor(64位精簡(jiǎn)指令集系統(tǒng)計(jì)算機(jī)微處理器)
中文描述： 64位RISC（精簡(jiǎn)指令集計(jì)算機(jī)）微處理器（64位精簡(jiǎn)指令集系統(tǒng)計(jì)算機(jī)微處理器）
文件頁(yè)數(shù)： 2/60頁(yè)
文件大?。?/td> 244K
代理商： TMPR4956F
TOSHIBA
TENTATIVE
TMPR4955/56
20-Oct.-1999
2
1.
GENERAL DESCRIPTION
The TMPR4955/56F is a 64-bit RISC (Reduced Instruction Set Computer) microprocessor that is
a low-cost, low-power microprocessor developed for interactive consumer applications including
set-top terminals, LBP(Laser Beam Printer), and video games.
2.
FEATURES
True 64-bit microprocessor, with TX49/H core.
Optimized 5-stage pipeline
System Address/Data bus
TMPR4955 : 32-bit System Address/Data bus
TMPR4956 : 32-bit or 64-bit System Address/Data bus
Single or double-precision floating-point unit ( IEEE Standard 754 exceptions )
36-bit physical address space and 64-bit virtual address space.
O
n-chip 32-Kbyte Instruction Cache and 32-Kbyte Data Cache.
4-way set associative and Lock function support
Low power consumption
3.3 /2.5V Dual power supply (I/O:3.3V,Internal:2.5V)
Reduced power mode (Doze/Halt)
Instruction cache prefetching
Memory management unit
contains 48-double entry JTLB, 2-entry Instruction TLB, and 4-entry Data TLB
Software compatibility with all MIPS processors
MIPS I, II, and III Instruction Set Architecture (ISA)
EJTAG (Enhanced JTAG) debug support
Package :
TMPR4955 : 160-pin QFP
TMPR4956 : 208-pin QFP
Maximum operating frequency
Internal:167/200MHz
Floating-Point Operation
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