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TS68882
2119A–12/01
Introduction
The TS 68882 is a high performance floating-point device designed to interface with the TS
68020 or TS 68030 as a coprocessor. This device fully supports the TS 68000 virtual machine
architecture, and is implemented in HCMOS, Atmel’s low power, small geometry process. This
process allows CMOS and HMOS (high-density NMOS) gates to be combined on the same
device. CMOS structures are used where speed and low power is required, and HMOS struc-
tures are used where minimum silicon area is desired. The HCMOS technology enables the
TS 68882 to be very fast while consuming less power than comparable HMOS, and still have
a reasonably small die size.
With some performance degradation, the TS 68882 can also be used as a peripheral proces-
sor in systems where the TS 68020 or TS 68030 is not the main processor (e.g., TS 68000, TS
68010). The configuration of the TS 68882 as a peripheral processor or coprocessor may be
completely transparent to user software (e.g., the same object code may be executed in either
configuration).
The architecture of the TS 68882 appears to the user as a logical extension of the TS 68000
Family architecture. Coupling of the coprocessor interface allows the TS 68020/TS 68030 pro-
grammer to view the TS 68882 registers as though the registers are resident in the TS
68020/TS 68030. Thus, a TS 68020 or TS 68030/TS 68882 device pair appears to be one pro-
cessor that supports seven floating-point and integer data types, and has eight integer data
registers, eight address registers, and eight floating-point data registers.
As shown in Figure 1, the TS 68882 is internally divided into four processing elements; the bus
interface unit (BIU), the conversion control unit (CCU), the execution control unit (ECU), and
the microcode control unit (MCU). The BIU communicates with the main processor, the CCU
controls the main processor communications dialog and performs some data conversions, and
the ECU and MCU execute most floating-point calculations.
The BIU contains the coprocessor interface registers, and the 32-bit control, and instruction
address registers. In addition to these registers, the register select and DSACK timing control
logic is contained in the BIU. Finally, the status flags used to monitor the status of communica-
tions with the main processor are contained in the BIU.
The CCU contains special purpose hardware that performs conversions between the single,
double, and extended precision memory data formula and the internal data format used by the
ECU. It also contains a state machine that controls communications with the main processor
during coprocessor interface dialogs.
The eight 80-bit floating-point data registers (FP0-FP7) are located in the ECU. In addition to
these registers, the ECU contains a high-speed 67-bit arithmetic unit used for both mantissa
and exponent calculations, a barrel shifter that can shift from 1 bit to 67 bits in one machine
cycle, and ROM constants (for use by the internal algorithms or user programs).
The MCU contains the clock generator, a two-level microcoded sequencer that controls the
ECU, the microcode ROM, and self-test circuitry. The built-in self-test capabilities of the TS
68882 enhance reliability and ease manufacturing requirements; however, these diagnostic
functions are not available to the user.