參數(shù)資料
型號: TS8882VF20
文件頁數(shù): 30/42頁
文件大?。?/td> 1703K
代理商: TS8882VF20
30
TS68882
2119A
12/01
as though it is part of the MPU. There are no special restrictions imposed by the coprocessor
interface, and floating-point arithmetic is coded exactly like integer arithmetic.
Address Bus (A0
through A4)
These active-high address line inputs are used by the main processor to select the coproces-
sor interface register locations located in the CPU address space. These lines control the
register selection as listed in Table 10.
When the TS 68882 is configured to operate over an 8-bit data bus, the A0 pin is used as an
address signal for byte accesses of the coprocessor interface registers. When the TS 68882 is
configured to operate over a 16- or 32-bit system data bus, both the A0 and SIZE pins are
strapped high and/or low as listed in Table 11.
Data Bus (D0
through D31)
This 32-bit, bi-directional, three-state bus serves as the general purpose data path between
the TS 68020/TS 68030 and the TS 68882. Regardless of whether the TS 68882 is operated
as a coprocessor or a peripheral processor, all inter-processor transfers of instruction informa-
tion, operand data, status information, and requests for service occur as standard TS 68000
bus cycles.
The TS 68882 will operate over an 8-, 16-, or 32-bit system data bus. Depending upon the
system data bus configuration, both the A0 and SIZE pins are configured specifically for the
applicable bus configuration. (Refer to ADDRESS BUS (A0 through A4) and SIZE (SIZE for
further details).
Table 10.
Coprocessor Interface Register Selection
A4-A0
Offset
Width
Type
Register
0000x
S00
16
Read
Response
0001x
S02
16
Write
Control
0010x
S04
16
Read
Save
0011x
S06
16
R/W
Restore
0100x
S08
16
-
(Reserved)
0101x
S0A
16
Write
Command
0110x
S0C
16
-
(Reserved)
0111x
S0E
16
Write
Condition
100xx
S10
32
R/W
Operand
1010x
S14
16
Read
Register select
1011x
S16
16
-
(Reserved)
110xx
S18
32
Read
Instruction Address
111xx
S1C
32
R/W
Operand Address
Table 11.
System Data Bus Size Configuration
A0
Size
Data bus
Low
8-Bit
Low
High
16-Bit
High
High
32-Bit
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