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| 型號： | TS8882VF20 |
| 文件頁數(shù)： | 22/42頁 |
| 文件大小： | 1703K |
| 代理商： | TS8882VF20 |
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22
TS68882
2119A
–
12/01
Since the coprocessor interface protocol is based solely on bus transfers, the protocol is easily
emulated by software when the TS 68882 is used as a peripheral with any processor capable
of memory-mapped I/O over on TS 68000 style bus. When used as a peripheral processor
with the 8-bit TS 68008 or the 16-bit TS 68000, or TS 68010, all TS 68882 instructions are
trapped by the main processor to an exception handler at execution time. Thus, the software
emulation of the processor interface protocol can be totally transparent to the user. The sys-
tem can be quickly upgraded by replacing the main processor with an TS 68020/TS 68030
without changes to the user software.
Since the bus is asynchronous, the TS 68882 need not run at the same clock speed as the
main processor. Total system performance may therefore be customized. For example, a sys-
tem requiring very fast floating-point arithmetic with relatively slow integer arithmetic can be
designed with an inexpensive main processor and a fast TS 68882.
Coprocessor
Interface
The TS 68000 Family coprocessor interface is an integral part of the TS 68882 and TS
68020/TS 68030 designs, with the interface tasks shared between the two. The interface is
fully compatible with all present and future TS 68000 Family products. Tasks are partitioned
such that the TS 68020/TS 68030 does not have to decode coprocessor instructions and, the
TS 68882 does not have to duplicate main processor functions such as effective address
evaluation.
This partitioning provides an orthogonal extension of the instruction set by permitting TS
68882 instructions to utilize all TS 68020/TS 68030 addressing modes and to generate execu-
tion time exception traps. Thus, from the programmer
’
s view, the CPU and coprocessor
appear to be integrated onto a single chip. While the execution of the majority of TS 68882
instructions may be overlapped with the execution of TS 68020/TS 68030 instructions, concur-
rency is completely transparent to the programmer. The TS 68020/TS 68030 single-step and
program flow (trace) modes are fully supported by the TS 68882 and the TS 68000 Family
coprocessor interface.
While the TS 68000 Family coprocessor interface permits coprocessors to be bus masters,
the TS 68882 is never a bus master. The TS 68882 requests that the TS 68020/TS 68030
fetch all operands and store all results. In this manner, the TS 68020/TS 68030 32-bit data bus
provides high speed transfer of floating-point operands and results while simplifying the design
of the TS 68882.
Since the coprocessor interface is based solely upon bus cycles and the TS 68882 is never a
bus master, the TS 68882 can be placed on either the logical or physical side of the system
memory management unit. This provides a great deal of flexibility in the system design.
The virtual machine architecture of the TS 68000 Family is supported by the coprocessor
interface and the TS 68882 through the FSAVE and FRESTORE instructions. If the TS
68020/TS 68030 detects a page fault and/or task time out, it can force the TS 68882 to stop
whatever operation is in process at any time (even in the middle of the execution of an instruc-
tion) and save the TS 68882 internal state in memory.
The size of the saved internal state of the TS 68882 is dependent upon what the CCU and
ECU are doing at the time that the FSAVE is executed. If the TS 68882 is in the reset state
when the FSAVE instruction is received, only one word of state is transferred to memory,
which may be examined by the operating system to determine that the coprocessor program-
mer
’
s model is empty. If the coprocessor is idle when the save instruction is received, only a
few words of internal state are transferred to memory. If the TS 68882 is in the middle of per-
forming a calculation, it may be necessary to save the entire internal state of the machine.
Instructions that can complete execution in less time than it would take to save the larger state
in mid-instruction are allowed to complete execution and then save the idle state.
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