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參數(shù)資料
| 型號： | TS8882VF20 |
| 文件頁數(shù)： | 33/42頁 |
| 文件大?。?/td> | 1703K |
| 代理商： | TS8882VF20 |
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33
TS68882
2119A
–
12/01
16-Bit Data Bus
Coprocessor
Connection
Figure 19 illustrates the coprocessor interface connection of an TS 68882 to an TS 68020/TS
68030 via a 16-bit data bus. The TS 68882 is configured to operate over a 16-bit data bus
when the SIZE pin is connected to V
CC
, and the A0 pin is connected to GND. The sixteen least
significant data pins (D0-D15) must be connected to the sixteen most significant data pins
(D16-D31) when the TS 68882 is configured to operate over a 16-bit data bus (i.e., connect D0
to D16, D1 to D17,... and D15 to D31). The DSACK pins of the two devices are directly con-
nected, although it is not necessary to connect the DSACK0 pin since the TS 68882 never
asserts it in this configuration.
8-Bit Data Bus
Coprocessor
Connection
Figure 20 illustrates the connection of an TS 68882 to an TS 68020/TS 68030 as a coproces-
sor over an 8-bit data bus. The TS 68882 is configured to operate over a 8-bit data bus when
the SIZE pin is connected to GND. The twenty four least significant data pins (D0-D23) must
be connected to eight most significant data pins (D24-D31) when the TS 68882 is configured
to operate over a 8-bit data bus (i.e., connect D0 to D8, D16 to D24; D1 to D9, D17, and
D15;... and D7 to D15, D23 and D31). The DSACK pins of the two devices are directly con-
nected, although it is not necessary to connect the DSACK1 pin since the TS 68882 never
asserts it in this configuration.
TS 68882/TS 68000/TS 68008/TS 68010 Interfacing
The following paragraphs describe how to connect the TS 68882 to an TS 68000, TS 68008,
or TS 68010 processor for operation as a peripheral via an 8- or 16-bit data bus.
16-Bit Data Peripheral
Processor Connection
Figure 21 illustrates the connection of an TS 68882 to an TS 68000 or TS 68010 as a periph-
eral processor over an 16-bit data bus. The TS 68882 is configured to operate over an 16-bit
data bus when the SIZE pin is connected to V
CC
, and the A0 pin is connected to GND. The six-
teen least significant data pins (D0-D15) must be connected to the sixteen most significant
data pins (D16-D31) when the TS 68882 is configured to operate over an 16-bit data bus (i.e.,
connect D0 to D16, D1 to D17,... and D15 to D31). The DSACK1 pin of the TS 68882, is con-
nected to the DTACK pin of the main processor, and the DSACK0 pin is not used.
When connected as a peripheral processor, the TS 68882 chip select (CS) decode is system
dependent. If the TS 68000 is used as the main processor, the TS 68882 CS must be decoded
in the supervisor or user data spaces. However, if the TS 68010 is used as the main proces-
sor, the MOVES instruction may be used to emulate any CPU space access that the TS
68020/TS 68030 generates for coprocessor communications. Thus, the CS decode logic for
such systems may be the same as in an TS 68020/TS 68030 systems, such that the TS 68882
will not use any part of the data address spaces.
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