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| 型號： | TS8882VF20 |
| 文件頁數(shù)： | 36/42頁 |
| 文件大小： | 1703K |
| 代理商： | TS8882VF20 |
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36
TS68882
2119A
–
12/01
Figure 22.
8-bit Data Bus Peripheral Processor Connection
8-Bit Data Bus
Peripheral Processor
Connection
Figure 22 illustrates the connection of an TS 68882 to an TS 68008 as a peripheral processor
over an 8-bit data bus. The TS 68882 is configured to operate over an 8-bit data bus when the
SIZE pin is connected to GND. The eight least significant data pins (D0-D7) must be con-
nected to the twenty four most significant data pins (D8-D31) when the TS 68882 is configured
to operate over an 8 bit data bus (i.e., connect D0 to D8, D16 and D24; D1 to D9, D17, and
D25;... and D7 to D 15, D 23, and D31). The DSACK0 pin of the TS 68882 is connected to the
DTACK pin of the TS 68008, and the DSACK1 pin is not used.
When connected as a peripheral processor, the TS 68882 chip select (CS) decode is system
dependent, and the CS must be decoded in the supervisor or user data spaces.
Preparation For
Delivery
Certificate of
Compliance
ATMEL-Grenoble offers a certificate of compliance with each shipment of parts, affirming the
products are in compliance with MIL-STD-883 and guaranteeing the parameters are tested at
extreme temperatures for the entire temperature range.
Handling
Devices must be handled with certain precautions to avoid damage due to accumulation of
static charge. Input protection devices have been designed in the chip to minimize the effect of
this static buildup. However, the following handling practices are recommended:
a) Device should be handled on benches with conductive and grounded surface.
b) Ground test equipment, tools and operator.
c) Do not handle devices by the leads.
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