參數(shù)資料
型號(hào)： TVP3010-135
廠商： Texas Instruments, Inc.
英文描述： Hardware Cursor, GAMMA Correction VIP(135MHz,高/寬光標(biāo)，伽馬校正，視頻接口調(diào)色板)
中文描述： 硬件光標(biāo)，伽瑪校正貴賓（135MHz，高/寬光標(biāo)，伽馬校正，視頻接口調(diào)色板）
文件頁(yè)數(shù)： 42/100頁(yè)
文件大?。?/td> 571K
代理商： TVP3010-135
2–28
The windowing and color-key switching functions are integrated much like a logical OR function. If either
of the functions switches to palette graphics (VGA or overlay through the palette RAM), palette graphics are
displayed instead of direct color. Therefore, when programming the device for any direct-color mode, both
the color-key control and auxiliary-window registers must be set such that direct-color graphics is displayed.
For true color (gamma corrected through the palette), one of the functions must be set to palette graphics.
All of the switching functions can be performed using self-clocked or externally clocked frame-buffer
interface timing. Externally clocked timing allows all pixel port and VGA port timing to be referenced to CLK0
externally but can only be used for multiplex ratios of 1:1. If externally clocked timing is used, it is
recommended that the VGA blank signal also be utilized. See Section 2.3.2 for specific details on clocking.
All switching involving the VGA port can only be used with a 1:1 multiplex ratio.
2.6.1
The TVP3010 palette supports several windowing formats. These are specified by the auxiliary-control-
register bits 0–2 and PSEL as shown below.
Windowing Control
Window context switching is determined by the following equation:
switch = [(PSEL
×
ACR2) + (window
×
ACR1)]
⊕
ACR0
where:
window = 1 inside the auxiliary window.
ACRnis the nth bit of the auxiliary-control register.
The following table then applies:
MULTIPLEX MODE SELECTED
(see Note 18)
DISPLAY RESULT
SWITCH = 0
direct color
SWITCH = 1
VGA
direct color with VGA
direct color
direct color
overlay
NOTES: 18. The multiplex mode is set by multiplex-control registers 1 and 2. If VGA switching is desired, multiplex-
control register 2 bit 7 must be set to a logic 1 to enable the VGA port and the desired direct-color mode
must be chosen with the remaining MCR bits. For example, if direct-color mode 1 is chosen and multiplex-
control register 2 is normally set to 1B (hex), it would instead be set to 9B (hex) for VGA switching.
19. The DAC output is undefined if switch = 1 when doing overlay switching in a direct-color mode that does
not have overlay capability. If switching between direct color and VGA, any direct-color mode may be
chosen as long as the multiplex ratio is 1:1.
20. Auxiliary-control register bits ACR2 and ACR1 can be used to independently enable or disable the
port-select and windowing functions as shown in the equation above. If both switching functions are
disabled, ACR0 is used to default the display to either direct color or palette graphics. Palette graphics are
either VGA or overlay if in a direct-color mode or pseudo-color when in the pseudo-color mode. The reset
default is for palette graphics to be displayed as needed for the VGA pass-through mode.
21. All of the switching modes that involve overlay and direct color support the multiple multiplexing ratios or
LCLK divide ratios specified in Section 2.4.3 and Table 2–6 for those modes supporting overlay. However,
caution must be observed when using the port-select function with the multiplexing modes other than 1:1
since the PSEL signal is latched on LCLK (same as the pixel port).
22. The windowing functions can be performed using self-clocked or externally clocked frame-buffer interface
timing (see Section 2.3.2). If VGA switching is involved, CLK0 is the main clock source since VGA port data
is latched on the rising edge of this signal. Self-clocked timing can be used by externally connecting RCLK
to LCLK; however, this method is limited to a pixel rate of 50 MHz due to the delay from CLK0 to RCLK.
Externally clocked timing references all pixel data latching to CLK0 by externally connecting CLK0 to LCLK.
In both cases, the internal circuit pipeline delay is adjusted so that the VGA and pixel-port data are
synchronous in time.
相關(guān)PDF資料
PDF描述
TVP3010-170 Hardware Cursor, GAMMA Correction VIP(170MHz,高/寬光標(biāo)，伽馬校正，視頻接口調(diào)色板)
TVP3010-85 Hardware Cursor, GAMMA Correction VIP(85MHz,高/寬光標(biāo)，伽馬校正，視頻接口調(diào)色板)
TVP3010C Video Interface Palette
TVP3010M Video Interface Palette
TVP3020-175 Video Interface PALETTE(視頻接口調(diào)色器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TVP3010-135FN 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Video DAC with Color Palette (RAMDAC)
TVP3010-135MGA 制造商:Rochester Electronics LLC 功能描述:- Bulk
TVP3010-135MGAB 制造商:Rochester Electronics LLC 功能描述:- Bulk
TVP3010-170FN 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Video DAC with Color Palette (RAMDAC)
TVP3010-85FN 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Video DAC with Color Palette (RAMDAC)
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*