vi
List of Tables
Title
Table
Page
2–1
2–2
2–3
2–4
2–5
2–6
2–7
2–8
2–9
2–10 True-Color Mode Pixel-Latching Sequence (Little-Endian)
2–11 True-Color Mode Pixel-Latching Sequence (Big-Endian)
2–12 Configuration Register
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–13 General-Control Register
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–14 Cursor-Control Register
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Direct Register Map
Indirect Register Map (Extended Registers)
Allocation of Palette-Page Register Bits
Input-Clock-Selection Register
Output-Clock-Selection Register Format
Multiplex Mode and Bus-Width Selection
Pseudo-Color Mode Pixel-Latching Sequence
Direct-Color Mode Pixel-Latching Sequence (Little-Endian)
Direct-Color Mode Pixel-Latching Sequence (Big-Endian)
2–1
2–1
2–4
2–6
2–7
2–15
2–18
2–19
2–20
2–21
2–22
2–37
2–38
2–39
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . .
D–1
8-Bit/Pixel Pseudo-Color (32-Bit Pixel Bus, 4:1) Self-Clocked, LCLK
and RCLK Enabled
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
24-Bit True Color (32-Bit Pixel Bus, 1:1) Self-Clocked, RCLK = LCLK Internal
24-Bit Direct Color (32-Bit Pixel Bus, 1:1) Self-Clocked, No Overlay
24-Bit Direct Color (32-Bit Pixel Bus, 1:1) Self-Clocked,
Overlay PSEL Switched
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
24-Bit Direct Color (32-Bit Pixel Bus, 1:1) Externally-Clocked, VGA PSEL Switched
Overlay Auxiliary Window Switched
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16-Bit Direct Color (32-Bit Pixel Bus, 2:1) Self-Clocked,
Overlay Auxiliary Window Switched
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
D–1
D–1
D–1
D–2
D–3
D–4
. . .
. . . . . . . . . . . .
D–2
D–5
D–2
D–6
D–2