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參數(shù)資料
| 型號(hào)： | UM_S3C49F9X |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | S3C49F9X User’s Manual |
| 中文描述： | S3C49F9X用戶手冊(cè) |
| 文件頁(yè)數(shù)： | 32/74頁(yè) |
| 文件大?。?/td> | 653K |
| 代理商： | UM_S3C49F9X |
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S3C49F9X SOLID DISK CONTROLLER CARD CONFIGURATION
31
4.2 Configuration Option Register (Address 200h in attribute memory)
The Configuration Option Register is used to configure the cards interface, address decoding and
interrupt and to issue a soft reset to the PC Card.
Operation
D7
D6
D5
R/W
SRESET LevIREQ
Conf5
SRESET
Soft Reset - Setting this bit to one (1), waiting the minimum reset width time and
returning to zero (0) places the PC Card in the reset state. Setting this bit to one (1) is equivalent to
assertion of the +RESET signal except that the SRESET bit is not cleared. Returning this bit to zero (0)
leaves the PC Card in the same un-configured, Reset state as following power-up and hardware reset.
This bit is set to zero (0) by power-up and hardware reset. Using the PCMCIA Soft Reset is considered a
hardware reset by the ATA commands. Contrast with software reset in the Device Control Register.
LevIREQ
This bit is set to one (1) when Level Mode Interrupt is selected, and zero (0) when
pulse mode is selected. Set to zero (0) by reset.
Conf5 - Conf0
Configuration Index. Set to zero (0) by reset. It's used to select operation mode of the
PC Card as shown below.
Conf5 and Conf4 are reserved and must be written as zero (0)
Table 4-4 Card Configurations
D4
Conf4
D3
Conf3
D2
Conf2
D1
Conf1
D0
Conf0
Note:
Conf5
Conf4
Conf3
Conf2
Conf1
Conf0
Disk Card Mode
0
0
0
0
0
0
Memory Mapped
0
0
0
0
0
1
I/O Mapped, Any 16byte system decoded boundary
0
0
0
0
1
0
I/O Mapped, 1F0-1F7/3F6-3F7
0
0
0
0
1
1
I/O Mapped, 170-177/376-377
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