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| 型號(hào)： | UM_S3C49F9X |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | S3C49F9X User’s Manual |
| 中文描述： | S3C49F9X用戶(hù)手冊(cè) |
| 文件頁(yè)數(shù)： | 40/74頁(yè) |
| 文件大?。?/td> | 653K |
| 代理商： | UM_S3C49F9X |
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S3C49F9X SOLID DISK CONTROLLER CARD CONFIGURATION
39
4.9.1 I/O Primary and Secondary address configurations
Table 4-10 Primary and Secondary I/O Decoding
-REG
A9-A4
A3
A2
A1
A0
-IORD=0
-IOWR=0
Notes
0
1F(17)
0
0
0
0
Even RD Data
Even WR Data
1,2
0
1F(17)
0
0
0
1
Error Register
Features
1
0
1F(17)
0
0
1
0
Sector Count
Sector Count
0
1F(17)
0
0
1
1
Sector No.
Sector No.
0
1F(17)
0
1
0
0
Cylinder Low
Cylinder Low
0
1F(17)
0
1
0
1
Cylinder High
Cylinder High
0
1F(17)
0
1
1
0
Select Card/Head Select Card/Head
0
1F(17)
0
1
1
1
Status
Command
0
3F(37)
0
1
1
0
Alt Status
Drive Control
0
3F(37)
0
1
1
1
Drive Address
Reserved
Note:
combined Odd Data Bus and Even Data Bus (D15-D0). This register may also be accessed by a pair of byte
accesses to the offset 0 with -CE1 low and -CE2 high. Note that the address space of this word register overlaps the
address space of the Error and Feature byte-wide registers which lie at offset 1. When accessed twice as byte
register with -CE1 low, the first byte to be accessed is the even byte of the word and the second byte accessed is
the odd byte of the equivalent word access.
2. A byte accesses to register 0 with -CE1 high and -CE2 low accesses the error (read) or feature (write) register.
3. Address lines which are not indicated are ignored by the PC Card for accessing all the registers in this table.
1. Register 0 is accessed with -CE1 low and -CE2 low (and A0 = Don't Care) as a word register on the
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