參數(shù)資料
型號: UM_S3C49F9X
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: S3C49F9X User’s Manual
中文描述: S3C49F9X用戶手冊
文件頁數(shù): 9/74頁
文件大小: 653K
代理商: UM_S3C49F9X
S3C49F9X SOLID DISK CONTROLLER PIN INFORMATION
9
Table 2-2 I/O Type Description
I/O
Type
Pad Type
Description
I1
PVIL3
3.3V TTL schmitt trigger level PCMCIA LIN input buffer
I2
PVILU3
3.3V TTL schmitt trigger level PCMCIA LIN input buffer with pull-up register
I3
PIS
CMOS schmitt trigger level input buffer
I4
PIC
CMOS level input buffer
I5
PICU
CMOS level input buffer with pull-up register
I6
PICD
CMOS level input buffer with pull-down register
I7
PVILD3
3.3V TTL schmitt trigger level PCMCIA LIN input buffer with pull-down register
O1
PVOB43
3.3V 4mA PCMCIA output buffer without SRC
O2
POD4
4mA open drain output buffer
O3
POB4
4mA Normal output buffer
O4
POB4SM
4mA Normal output buffer with medium slew-rate control
O5
POB16SM
16mA Normal output buffer with medium slew-rate control
O6
POB12
12mA Normal output buffer
B1
PVBTT43
3.3V 4mA PCMCIA LIN bi-directional buffer without SRC
B2
PBCT4
CMOS level input buffer and 4mA tri-state output buffer
B3
PBCT4SM
CMOS level input buffer and 4mA tri-state output buffer with medium slew-rate
control
B4
PBCUT4SM
CMOS level input buffer with pull-up register and 4mA tri-state output buffer with
medium slew-rate control
B5
PBCT8SM
CMOS level input buffer and 8mA tri-state output buffer with medium slew-rate
control
B6
PBCUT8SM
CMOS level input buffer with pull-up register and 8mA tri-state output buffer with
medium slew-rate control
B7
PBCDT8
CMOS level input buffer with pull-down register and 8mA tri-state output buffer
B8
PBSDT4SM
CMOS schmitt trigger level input buffer with pull-down register and 4mA tri-state
output buffer with medium slew-rate control
B9
PBCT16SM
CMOS level input buffer and 16mA tri-state output buffer with medium slew-rate
control
B10
PVBTD43
3.3V 4mA PCMCIA LIN bi-directional buffer without SRC with pull-down register
OSC
PSOSCM26
Oscillator cell with enable and register
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