In" />
參數(shù)資料
型號(hào)： XC6SLX100T-2FG484I
廠商： Xilinx Inc
文件頁(yè)數(shù)： 2/89頁(yè)
文件大小： 0K
描述： IC FPGA SPARTAN 6 484FGGBGA
標(biāo)準(zhǔn)包裝： 60
系列： Spartan® 6 LXT
LAB/CLB數(shù)： 7911
邏輯元件/單元數(shù)： 101261
RAM 位總計(jì)： 4939776
輸入/輸出數(shù)： 296
電源電壓： 1.14 V ~ 1.26 V
安裝類型： 表面貼裝
工作溫度： -40°C ~ 100°C
封裝/外殼： 484-BBGA
供應(yīng)商設(shè)備封裝： 484-FBGA
Spartan-6 FPGA Data Sheet: DC and Switching Characteristics
DS162 (v3.0) October 17, 2011
Product Specification
10
In Table 9 and Table 10, values for VIL and VIH are recommended input voltages. Values for IOL and IOH are guaranteed over
the recommended operating conditions at the VOL and VOH test points. Only selected standards are tested. These are
chosen to ensure that all standards meet their specifications. The selected standards are tested at a minimum VCCO with the
respective VOL and VOH voltage levels shown. Other standards are sample tested.
Table 9: Single-Ended I/O Standard DC Input and Output Levels
I/O Standard
VIL
VIH
VOL
VOH
IOL
IOH
V, Min
V, Max
V, Min
V, Max
V, Min
mA
LVTTL
–0.5
0.8
2.0
4.1
0.4
2.4
LVCMOS33
–0.5
0.8
2.0
4.1
0.4
VCCO –0.4
LVCMOS25
–0.5
0.7
1.7
4.1
0.4
VCCO –0.4
LVCMOS18
–0.5
0.38
0.8
4.1
0.45
VCCO –0.45
LVCMOS18 (-1L)
–0.5
0.33
0.71
4.1
0.45
VCCO –0.45
LVCMOS18_JEDEC
–0.5
35% VCCO
65% VCCO
4.1
0.45
VCCO –0.45
LVCMOS15
–0.5
0.38
0.8
4.1
25% VCCO
75% VCCO
LVCMOS15 (-1L)
–0.5
0.33
0.71
4.1
25% VCCO
75% VCCO
LVCMOS15_JEDEC
–0.5
35% VCCO
65% VCCO
4.1
25% VCCO
75% VCCO
LVCMOS12
–0.5
0.38
0.8
4.1
0.4
VCCO –0.4
LVCMOS12 (-1L)
–0.5
0.33
0.71
4.1
0.4
VCCO –0.4
LVCMOS12_JEDEC
–0.5
35% VCCO
65% VCCO
4.1
0.4
VCCO –0.4
PCI33_3
–0.5
30% VCCO
50% VCCO
VCCO + 0.5
10% VCCO
90% VCCO
1.5
–0.5
PCI66_3
–0.5
30% VCCO
50% VCCO
VCCO + 0.5
10% VCCO
90% VCCO
1.5
–0.5
I2C
–0.5
25% VCCO
70% VCCO
4.1
20% VCCO
–3
–
SMBUS
–0.5
0.8
2.1
4.1
0.4
–
4
–
SDIO
–0.5
12.5% VCCO
75% VCCO
4.1
12.5% VCCO
75% VCCO
0.1
–0.1
MOBILE_DDR
–0.5
20% VCCO
80% VCCO
4.1
10% VCCO
90% VCCO
0.1
–0.1
HSTL_I
–0.5
VREF –0.1
VREF + 0.1
4.1
0.4
VCCO –0.4
8
–8
HSTL_II
–0.5
VREF –0.1
VREF + 0.1
4.1
0.4
VCCO – 0.4
16
–16
HSTL_III
–0.5
VREF –0.1
VREF + 0.1
4.1
0.4
VCCO – 0.4
24
–8
HSTL_I_18
–0.5
VREF –0.1
VREF + 0.1
4.1
0.4
VCCO – 0.4
11
–11
HSTL_II_18
–0.5
VREF –0.1
VREF + 0.1
4.1
0.4
VCCO – 0.4
22
–22
HSTL_III_18
–0.5
VREF –0.1
VREF + 0.1
4.1
0.4
VCCO – 0.4
30
–11
SSTL3_I
–0.5
VREF –0.2
VREF +0.2
4.1
VTT –0.6
VTT +0.6
8
–8
SSTL3_II
–0.5
VREF –0.2
VREF +0.2
4.1
VTT –0.8
VTT + 0.8
16
–16
SSTL2_I
–0.5
VREF –0.15
VREF +0.15
4.1
VTT –0.61
VTT + 0.61
8.1
–8.1
SSTL2_II
–0.5
VREF –0.15
VREF +0.15
4.1
VTT –0.81
VTT + 0.81
16.2
–16.2
SSTL18_I
–0.5
VREF – 0.125
VREF + 0.125
4.1
VTT –0.47
VTT + 0.47
6.7
–6.7
SSTL18_II
–0.5
VREF – 0.125
VREF + 0.125
4.1
VTT –0.60
VTT + 0.60
13.4
–13.4
SSTL15_II
–0.5
VREF –0.1
VREF +0.1
4.1
VTT –0.4
VTT + 0.4
13.4
–13.4
Notes:
1.
Tested according to relevant specifications.
2.
Using drive strengths of 2, 4, 6, 8, 12, 16, or 24 mA.
3.
Using drive strengths of 2, 4, 6, 8, 12, or 16 mA.
4.
Using drive strengths of 2, 4, 6, 8, or 12 mA.
5.
For more information, refer to UG381: Spartan-6 FPGA SelectIO Resources User Guide.
相關(guān)PDF資料
PDF描述
24LC256T-I/ST IC EEPROM 256KBIT 400KHZ 8TSSOP
7-745129-1 CONN FERRULE INNER CRIMP DB15-37
1478764-2 CRIMP KIT 7.5MM
1478764-1 CRIMP KIT 6.0MM
1478764-4 CRIMP KIT 9.5MM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XC6SLX100T-2FG676C 制造商:Xilinx 功能描述:FPGA SPARTAN?-6 FAMILY 101261 CELLS 45NM (CMOS) TECHNOLOGY 1 - Trays 制造商:Xilinx 功能描述:IC FPGA 376 I/O 676FCBGA 制造商:Xilinx 功能描述:IC FPGA SPARTAN 6 101K 676BGA
XC6SLX100T-2FG676I 功能描述:IC FPGA SPARTAN 6 676FGGBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:Spartan® 6 LXT 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標(biāo)準(zhǔn)包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計(jì):4866048 輸入/輸出數(shù):480 門數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5
XC6SLX100T-2FG900C 制造商:Xilinx 功能描述:FPGA SPARTAN?-6 FAMILY 101261 CELLS 45NM (CMOS) TECHNOLOGY 1 - Trays 制造商:Xilinx 功能描述:IC FPGA SPARTAN 6 101K 900BGA
XC6SLX100T-2FG900I 功能描述:IC FPGA SPARTAN 6 900FGGBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:Spartan® 6 LXT 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標(biāo)準(zhǔn)包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計(jì):4866048 輸入/輸出數(shù):480 門數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5
XC6SLX100T-2FGG484C 功能描述:IC FPGA SPARTAN 6 101K 484FGGBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門陣列） 系列:Spartan® 6 LXT 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標(biāo)準(zhǔn)包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計(jì):4866048 輸入/輸出數(shù):480 門數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*