
XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
á
103
N
OTE
:
For more information on the A-Bit, within the ITU-T G.751 frame, refer to
Section 5.1.1.1
.
Bits 4, 3, TxNSourceSel[1:0]
These two Read/Write bit-fields combine to specify the source of the N-Bit, within each outbound E3 frame.
The relationship between these two bit-fields and the resulting source of the N-Bit is tabulated below.
N
OTE
:
For more information on the N-Bit, within the ITU-T G.751 frame, refer to
Section 5.1.1.2
.
Bit 2 - TxAIS Enable
This Read/Write bit-field permits the user to configure the Transmit Section of the Framer IC to transmit an AIS
pattern to the remote terminal
Setting this bit-field to "0" configures the Transmit Section (of the chip) to transmit data in a normal manner
(e.g., as received via the Input Interface).
Setting this bit-field to "1" configures the Transmit Section (of the chip) to transmit an "All Ones" pattern (e.g.,
an AIS pattern) to the remote terminal.
N
OTE
:
For more information on the AIS pattern, refer to
Section 5.2.4.2.1.1
.
Bit 1 - TxLOS Enable
This Read/Write bit-field permits the user to configure the Transmit Section of the Framer IC to transmit an LOS
(e.g., All Zeros) pattern to the remote terminal
Setting this bit-field to "0" configures the Transmit Section (of the chip) to transmit data in a normal manner
(e.g., as received via the Input Interface).
Setting this bit-field to "1" configures the Transmit Section (of the chip) to transmit an "All Zeros" pattern (e.g.,
an LOS pattern) to the remote terminal.
N
OTE
:
For more information on the LOS pattern, refer to
Section 5.2.4.2.1.2
.
Bit 0 - TxFAS Source Select
This Read/Write bit-field permits the user to configure the Transmit Section of the Channel to either:
a.
Internally generate the FAS (Framing Alignment Signal) pattern, within the outbound E3 frames, or to
b.
use the Input Interface as the source for the FAS pattern.
Setting this bit-field to "0" configures the Transmit Section of the Channel to internally generate the FAS
pattern, for each outbound E3 frame.
T
X
AS
OURCE
S
EL
[1:0]
S
OURCE
OF
A-B
IT
00
TxE3 Service Bits Register (Address = 0x35)
01
Transmit Overhead Data Input Interface
10
Transmit Payload Data Input Interface
11
Functions as a FEBE (Far-End-Block Error) bit-field.
This bit-field is set to "0", if the Near-End Receive Section (within this chip) detects no BIP-4
Errors within the incoming E3 frames.
This bit-field is set to "1", if the Near-End Receive Section (within this chip) detects a BIP-4
Error within the incoming E3 frame.
T
X
NS
OURCE
S
EL
[1:0]
S
OURCE
OF
N-B
IT
00
TxE3 Service Bits Register (Address = 0x35)
01
Transmit Overhead Data Input Interface
10
Transmit LAPD Controller
11
Transmit Payload Data Input Interface
.