á
XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
164
Transmit FEAC Processor will generate an interrupt (if enabled) to the local μP/μC upon completion of the 10th
transmission of the FEAC Message. The purpose of having the Framer generate this interrupt is to let the local
μP/μC know that the Transmit FEAC Processor is now available and ready to transmit a new FEAC message.
The Transmit FEAC Processor continues to send the FEAC Code Message even after the 10
th
transmission
until the TxFEAC processor is disabled or a new FEAC code transmission is initiated.
If the TxFEAC processor is disabled, the FEAC bit contains a “1” which the remote Rx side interprets as an idle
FEAC message.
Figure 49
presents a flow chart depicting how to use the Transmit FEAC Processor.
N
OTE
:
The FEAC processor starts transmitting the last FEAC message when enabled. Execute the “Initiate Transmission
of the Outbound FEAC Message” step without delay to prevent unintended incorrect transmission. Rx FEAC
prossecor validates a FEAC code upon receiving the same code 8 times.
N
OTE
:
For a detailed description of the Receive FEAC Processor within the Receive DS3 HDLC Controller block, please
see
Section 4.3.3.1
.
4.2.3.2
Message-Oriented Signaling (e.g., LAP-D) processing via the Transmit DS3 HDLC
Controller
The LAPD Transmitter within the Transmit DS3 HDLC Controller Block allows the user to transmit Path
Maintenance Data Link (PMDL) messages to the remote terminal via the outbound DS3 Frames. The
F
IGURE
49. A F
LOW
C
HART
DEPICTING
HOW
TO
TRANSMIT
A
FEAC M
ESSAGE
VIA
THE
FEAC T
RANSMITTER
Enable the Transmit FEAC Processor
This is accomplished by writing xxxxx1xx
into the TxDS3 FEAC Configuration and
Status Register.
Has the
16-bit FEAC Mesage
been transmitted to
the remote terminal
10 times
Invoke the Transmit FEAC Interrupt
Service Routine
Generate the Transmit FEAC Interrupt
START
1
NO
Is Transmission
of the 16-bit
FEAC Message
complete
WriteSix-Bit Outbound FEAC Value Into
the TxDS3 FEAC Register
The address is located at 0x32.
Initiate Transmission of the outbound
FEAC M essage
This is accomplished by writing xxxxx1xx
into the TxDS3 FEAC Configuration and
Status Register.
Transmit FEAC Processor Encapsulates the Outbound
FEAC value into a 16 bit Framing Structure.
Transmit FEAC Processor Proceeds to Insert the 16 bit
Message (in a bit-by-bit Manner) into the FEAC Fields
of each outbound DS3 Frame.
NOTE:
The FEAC processor starts transmitting
the last FEAC message when enabled.
Execute the “Initiate Transmission of
the Outbound FEAC Message” step
without delay to prevent unintended
incorrect transmission. Rx FEAC
prossecor validates a FEAC code upon
receiving the same code 8 times.
YES
NO
YES
1