XRT75R03D
67
REV. 1.0.4
THREE CHANNEL E3/DS3/STS-1 LINE
REGISTER DESCRIPTION - PER CHANNEL REGISTERS
TABLE 24: SOURCE LEVEL INTERRUPT ENABLE REGISTER - CHANNEL 0 ADDRESS LOCATION = 0X01
Channel 1 Address Location = 0x09
Channel 2 Address Location = 0x11)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Unused
Change of FL
Condition
Interrupt Enable
Ch 0
Change of LOL
Condition
Interrupt Enable
Ch 0
Change of LOS
Condition
Interrupt Enable
Ch 0
Change of
DMO Condition
Interrupt Enable
Ch 0
R/O
R/W
0
BIT NUMBER
NAME
TYPE
DEFAULT
VALUE
DESCRIPTION
7 - 4
Reserved
R/O
0
3
Change of FL
Condition Interrupt
Enable - Ch 0
R/W
0
Change of FL (FIFO Limit Alarm) Condition Interrupt Enable
- Ch 0:
This READ/WRITE bit-field is used to either enable or dis-
able the Change of FL Condition Interrupt. If the user
enables this interrupt, then the XRT75R03D will generate
an interrupt any time any of the following events occur.
Whenever the Jitter Attenuator (within Channel 0)
declares the FL (FIFO Limit Alarm) condition.
Whenever the Jitter Attenuator (within Channel 0) clears
the FL (FIFO Limit Alarm) condition.
0 - Disables the Change in FL Condition Interrupt.
1 - Enables the Change in FL Condition Interrupt.
2
Change of LOL
Condition Interrupt
Enable
R/W
0
Change of Receive LOL (Loss of Lock) Condition Interrupt
Enable - Channel 0:
This READ/WRITE bit-field is used to either enable or dis-
able the Change of Receive LOL Condition Interrupt. If the
user enables this interrupt, then the XRT75R03D will gener-
ate an interrupt any time any of the following events occur.
Whenever the Receive Section (within Channel 0)
declares the Loss of Lock Condition.
Whenever the Receive Section (within Channel 0) clears
the Loss of Lock Condition.
0 - Disables the Change in Receive LOL Condition Inter-
rupt.
1 - Enables the Change in Receive LOL Condition Interrupt.