參數(shù)資料
型號: XRT75R03DIVTR-F
廠商: Exar Corporation
文件頁數(shù): 119/135頁
文件大?。?/td> 0K
描述: IC LIU E3/DS3/STS-1 3CH 128LQFP
標準包裝: 750
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 3/3
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 128-LQFP
供應商設備封裝: 128-LQFP(14x20)
包裝: 帶卷 (TR)
XRT75R03D
80
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCRONIZER
REV. 1.0.4
2
LOSMUT Enable
R/W
0
Muting upon LOS Enable - Channel_n:
This READ/WRITE bit-field is used to configure the Receive
Section (within Channel_n) to automatically pull their corre-
sponding Recovered Data Output pins (e.g., RPOS_n and
RNEG_n) to GND anytime (and for the duration that) the
Receive Section declares the LOS defect condition. In
other words, this feature (if enabled) will cause the Receive
Channel to automatically mute the Recovered data anytime
(and for the duration that) the Receive Section declares the
LOS defect condition.
0 - Disables the Muting upon LOS feature. In this setting
the Receive Section will NOT automatically mute the
Recovered Data whenever it is declaring the LOS defect
condition.
1 - Enables the Muting upon LOS feature. In this setting the
Receive Section will automatically mute the Recovered
Data whenever it is declaring the LOS defect condition.
1
Receive Monitor
Mode Enable
R/W
0
Receive Monitor Mode Enable - Channel_n:
This READ/WRITE bit-field is used to configure the Receive
Section of Channel_n to operate in the Receive Monitor
Mode.
If the user configures the Receive Section to operate in the
Receive Monitor Mode, then it will be able to receive a nom-
inal DSX-3/STSX-1 signal that has been attenuated by
20dB of flat loss along with 6dB of cable loss, in an error-
free manner. However, internal LOS circuitry is suppressed
and LOS will never assert nor LOS be declared when oper-
ating under this mode.
0 - Configures the corresponding channel to operate in the
Normal Mode.
1 - Configure the corresponding channel to operate in the
Receive Monitor Mode.
0
Receive Equalizer
Enable
R/W
0
Receive Equalizer Enable - Channel_n:
This READ/WRITE register bit is used to either enable or
disable the Receive Equalizer block within the Receive Sec-
tion of Channel_n, as listed below.
0 - Disables the Receive Equalizer within the corresponding
channel.
1 - Enables the Receive Equalizer within the corresponding
channel.
NOTE: For virtually all applications, we recommend that the
user set this bit-field to "1" (for all three channels)
and enable the Receive Equalizer.
BIT NUMBER
NAME
TYPE
DEFAULT
VALUE
DESCRIPTION
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XRT75R03ES 功能描述:時鐘合成器/抖動清除器 3CH T3/E3/STS1LIU+JA 3.3V W/REDUNDANCY RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
XRT75R03IV 功能描述:外圍驅(qū)動器與原件 - PCI 3CHNNEL E3/DS3/STS 1 JITTER ATTENUATOR RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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