參數(shù)資料
型號: XRT75R03DIVTR-F
廠商: Exar Corporation
文件頁數(shù): 110/135頁
文件大?。?/td> 0K
描述: IC LIU E3/DS3/STS-1 3CH 128LQFP
標準包裝: 750
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 3/3
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 128-LQFP
供應商設備封裝: 128-LQFP(14x20)
包裝: 帶卷 (TR)
XRT75R03D
72
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCRONIZER
REV. 1.0.4
5
Digital LOS Defect
Declared
R/O
0
Digital LOS Defect Declared:
This READ-ONLY bit-field indicates whether or not the Digi-
tal LOS (Loss of Signal) detector is declaring the LOS
Defect condition.
For DS3 and STS-1 applications, the Digital LOS Detector
will declare the LOS Defect condition whenever it detects
an absence of pulses (within the incoming DS3 or STS-1
data-stream) for 160 consecutive bit-periods.
Further, (again for DS3 and STS-1 applications) the Digital
LOS Detector will clear the LOS Defect condition whenever
it determines that the pulse density (within the incoming
DS3 or STS-1 signal) is at least 33%.
0 - Indicates that the Digital LOS Detector is NOT declaring
the LOS Defect Condition.
1 - Indicates that the Digital LOS Detector is currently
declaring the LOS Defect condition.
NOTES:
1.
LOS Detection (within each channel of the
XRT75R03D) is performed by both an Analog LOS
Detector and a Digital LOS Detector.
The LOS
state of a given Channel is simply a WIRED-OR of
the LOS Defect Declare states of these two
detectors.
2.
The current LOS Defect Condition (for the
channel) can be determined by reading out the
contents of Bit 1 (Receive LOS Defect Declared)
within this register.
BIT NUMBER
NAME
TYPE
DEFAULT
VALUE
DESCRIPTION
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XRT75R03IV 功能描述:外圍驅(qū)動器與原件 - PCI 3CHNNEL E3/DS3/STS 1 JITTER ATTENUATOR RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT75R03IV-F 功能描述:外圍驅(qū)動器與原件 - PCI 3-Ch E3/DS3/STS-1 RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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