參數(shù)資料
型號: XRT91L80IB-F
廠商: Exar Corporation
文件頁數(shù): 30/46頁
文件大?。?/td> 0K
描述: IC TXRX SONET/SDH 4BIT 196STBGA
產(chǎn)品變化通告: XRT91L80IB Obsolescence 6/Sept/2010
標(biāo)準(zhǔn)包裝: 126
類型: 收發(fā)器
規(guī)程: SONET/SDH
電源電壓: 3.3V
安裝類型: 表面貼裝
封裝/外殼: 196-LFBGA
供應(yīng)商設(shè)備封裝: 196-STBGA(12x12)
包裝: 托盤
xr
XRT91L80
REV. 1.0.0
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
33
D5
Reserved
This Register Bit is Not Used
X
D4
VCXOD
Voltage Controlled External Oscillator Lock Detection
The VCXOD is used to indicate whether the internal clock refer-
ence is locked to an external VCO.
"0" = VCXO currently not Locked
"1" = VCXO Locked
NOTE: VCXOLKEN must be enabled for this bit to have functional
meaning.
RO
0
D3
LOSD
Loss of Signal Detection
The LOSD indicates the LOS activity.
"0" = No Alarm
"1" = A LOS condition is present
RO
0
D2
CDRD
Clock and Data Recovery Lock Detection
The CDRD is used to indicate that the CDR is locked.
"0" = CDR Out of Lock
"1" = CDR Locked
RO
0
D1
CMUD
Clock Multiplier Unit Lock Detection
The CMUD is used to indicate that the CMU is locked.
"0" = CMU Out of Lock
"1" = CMU Locked
RO
0
D0
FIFOD
FIFO Overflow Detection
The FIFOD indicates that the FIFO is experiencing an overflow
condition.
"0" = No Alarm
"1" = A FIFO Overflow condition is present
RO
0
TABLE 14: MICROPROCESSOR REGISTER 0X03H BIT DESCRIPTION
CONFIGURATION 0 CONTROL REGISTER (0X03H)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
D7
Reserved
Reserved - Set to 0
R/W
0
D6
ALTFREQSEL
Input Reference Frequency Select
This bit is used to select the clock input reference.
"0" = 77.76/83.3 MHz
"1"= 155.52/166 MHz
R/W
1
D5
Reserved
Reserved - Set to 0
R/W
0
STATUS CONTROL REGISTER (0X02H)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
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