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參數(shù)資料
| 型號： | 22363A |
| 英文描述： | Simple System Interface for UltraNAND Flash |
| 中文描述： | 簡單的系統(tǒng)接口UltraNAND閃光 |
| 文件頁數(shù)： | 10/21頁 |
| 文件大?。?/td> | 725K |
| 代理商： | 22363A |
Simple System Interface for UltraNAND Flash
9
PLD Example Implementation
PLD Source Code for UNISA16
This Interface PLD, designed into a single AmPALLV16V8, allows one UltraNAND bank to be supported by a single
interface chip. This example includes the PLD source code and the simulation file used to verify the design. The
AMD AmPALLV16V8-10SC used in the example powers up in a known state which covers initial power-up condi-
tions. The RESET input is used to initialize the transparent latches in the PLD. Figure 4 is a diagram showing the
pin-out of the AmPALLV16V8-10SC used in this design example.
Name UNISA16;
Partno PLD001;
Date 03/23/99;
Revision 0;
Designer Ralph Gibson;
Company Advanced Micro Devices;
Assembly UltraNAND(TM) ISA Development Board Interface Solution;
Location U1;
Device G16V8;
Format J;
/****************************************************************************\
** This is a simple interface for UltraNAND allowing one UltraNAND to be **
** supported on a PC ISA bus. This device includes a RESET input to force **
** WP# asserted on power transitions. RESET is high until Vcc is valid **
** and goes high when supply power ramps down. **
\****************************************************************************/
/** Inputs **/
Pin 1 = !WRITE; /* System Write Enable */
Pin 2 = !READ; /* System Read Enable */
Pin [3..6] = [A0..3]; /* Address input to select port */
Pin 7 = !CE; /* Chip Enable for the interface and UltraNAND */
Pin 8 = RY_BY; /* RY/BY# input from UltraNAND */
Pin 9 = RESET; /* RESET - high for reset and power transitions */
Pin 11 = INIT; /* INIT from the optional Boot Loader PLD */
/** Outputs **/
Pin 19 = READY; /* Allows system to read RY/BY# pin state */
Pin 18 = CLE; /* Command Latch Enable to UltraNAND */
Pin 17 = ALE; /* Address Latch Enable to UltraNAND */
Pin 16 = !SE; /* Spare Area Enable to UltraNAND */
Pin 15 = !WP; /* Write Protect to UltraNAND */
Pin 14 = !OUTCE; /* Chip Enable to UltraNAND */
Pin 13 = !WE; /* Write Enable to UltraNAND */
Pin 12 = !RE; /* Read Enable to UltraNAND */
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