18
Simple System Interface for UltraNAND Flash
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V0064 */ 0 0 1 0 0 1 0 0 0 1
V0065 */ 0 1 1 0 0 1 0 0 0 1
V0066 */ 0 1 1 0 1 1 1 1 1 1
V0067 */ 0 0 1 1 X X 0 1 1 1
V0068 */ 0 1 1 1 X X 0 1 1 1
V0069 */ 0 0 1 1 X X 1 0 1 1
V0070 */ 0 1 1 1 X X 1 0 1 1
V0071 */ 0 0 1 1 X X 0 0 1 1
V0072 */ 0 1 1 1 X X 0 0 1 1
V0073 */ 0 0 1 1 X X 0 0 1 1
V0074 */ 0 1 1 1 X X 0 0 1 1
V0075 */ 0 0 1 1 X X 0 0 1 1
V0076 */ 0 1 1 1 X X 0 0 1 1
V0077 */ 0 0 1 1 X X 1 1 1 1
V0078 */ 0 1 1 1 X X 1 1 1 1
V0079 */ 0 1 0 1 X X 0 0 1 1
V0080 */ 0 1 1 1 X X 0 0 1 1
V0081 */ 0 1 0 1 X X 0 0 1 1
V0082 */ 0 1 1 1 X X 0 0 1 1
V0083 */ 1 1 1 0 1 1 1 1 0 1
V0084 */ 1 1 1 1 1 1 1 1 0 1
V0085 */ 0 0 1 0 1 0 0 0 0 1
V0086 */ 0 1 1 0 1 0 0 0 0 1
V0087 */ 0 0 1 0 1 0 1 0 0 1
V0088 */ 0 1 1 0 1 0 1 0 0 1
V0089 */ 0 0 1 0 1 1 0 0 0 1
V0090 */ 0 1 1 0 1 1 0 0 0 1
V0091 */ 0 1 1 1 1 1 1 1 0 1
V0092 */ 0 0 1 0 1 0 0 1 0 1
V0093 */ 0 1 1 0 1 0 0 1 0 1
V0094 */ 0 0 1 0 1 0 1 1 0 1
V0095 */ 0 1 1 0 1 0 1 1 0 1
V0096 */ 0 0 1 0 1 1 0 1 0 1
V0097 */ 0 1 1 0 1 1 0 1 0 1
V0098 */ 0 1 1 1 1 1 1 1 0 1
L L L L L L L H H Z /* Set SE#
L L L L L L L H H Z /* idle
L L L L L L L H H Z /* Initialize
H L L L L L L L H Z /* Write command-CLE */
H L L L L L L H H Z /* idle
L H L L L L L H H Z /* Set ALE
L H L L L L L H H Z /* idle
L H L L L L L L H Z /* Write address
L H L L L L L H H Z /* idle
L H L L L L L L H Z /* Write address
L H L L L L L H H Z /* idle
L H L L L L L L H Z /* Write address
L H L L L L L H H Z /* idle
L L L L L L L H H Z /* Clear ALE
L L L L L L L H H Z /* idle
L L L L L L L H L Z /* Read data
L L L L L L L H H Z /* idle
L L L L L L L H L Z /* Read data
L L L L L L L H H Z /* idle
L L L L H H H H H Z /* Reset the device
L L L L H H H H H Z /* idle
L L L L L H H H H Z /* Set OUTCE0#
L L L L L H H H H Z /* idle
L L L L L L H H H Z /* Set OUTCE1#
L L L L L L H H H Z /* idle
L L L L L L L H H Z /* Set OUTCE2#
L L L L L L L H H Z /* idle
L L L L L L L H H Z /* idle
L L L L H L L H H Z /* Clear OUTCE0#
L L L L H L L H H Z /* idle
L L L L H H L H H Z /* Clear OUTCE1#
L L L L H H L H H Z /* idle
L L L L H H H H H Z /* Clear OUTCE2#
L L L L H H H H H Z /* idle
L L L L H H H H H Z /* idle
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