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參數(shù)資料
| 型號(hào)： | 28F016XD |
| 廠商： | Intel Corp. |
| 英文描述： | 16-Mbit Synchronous Flash Memory(16M位DRAM接口閃速存儲(chǔ)器) |
| 中文描述： | 16兆位同步閃存（1,600位內(nèi)存接口閃速存儲(chǔ)器） |
| 文件頁數(shù)： | 13/54頁 |
| 文件大?。?/td> | 760K |
| 代理商： | 28F016XD |
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E
4.0 BUS OPERATIONS, COMMANDS AND STATUS REGISTER DEFINITIONS
28F016XD FLASH MEMORY
13
4.1 Bus Operations
Mode
Notes
RP#
RAS#
CAS#
OE#
WE#
DQ
0
–15
RY/BY#
Row Address Latch
1,2,9
V
IH
↓
V
IH
X
X
X
X
Column Address Latch
1,2,9
V
IH
V
IL
↓
X
X
X
X
Read
1,2,7
V
IH
V
IL
V
IL
V
IL
V
IH
D
OUT
X
Output Disable
1,6,7
V
IH
V
IL
V
IL
V
IH
V
IH
High Z
X
Standby
1,6,7
V
IH
V
IH
V
IH
X
X
High Z
X
Deep Power-Down
1,3
V
IL
X
X
X
X
High Z
V
OH
Manufacturer ID
4,8
V
IH
V
IL
V
IL
V
IL
V
IH
0089H
V
OH
Device ID
4,8
V
IH
V
IL
V
IL
V
IL
V
IH
66A8H
V
OH
Write
1,5,6
V
IH
V
IL
V
IL
X
V
IL
D
IN
X
NOTES:
1.
X can be V
or V
for address or control pins except for RY/BY#, which is either V
OL
or V
OH
, or High Z or D
OUT
for data
pins depending on whether or not OE# is active.
RY/BY# output is open drain. When the WSM is ready, erase is suspended or the device is in deep power-down mode,
RY/BY# will be at V
OH
if it is tied to V
CC
through a resistor. RY/BY# at V
OH
is independent of OE# while a WSM operation
is in progress.
RP# at GND ± 0.2V ensures the lowest deep power-down current.
A
(latched by CAS#) at V
provides the Manufacturer ID code. A
0
(latched by CAS#) at V
IH
provides the Device ID code.
All other addresses (row and column) should be set to zero.
Commands for erase, data program, or lock-block operations can only be completed successfully when V
PP
= V
PPH1
or
V
PP
= V
PPH2
.
While the WSM is running, RY/BY# stays at V
OL
until all operations are complete. RY/BY# goes to V
OH
when the WSM is
not busy or in erase suspend mode.
RY/BY# may be at V
OL
while the WSM is busy performing various operations (for example, a Status Register read during a
program operation).
The 28F016XD shares an identical device identifier with the 28F016XS.
Row (upper) addresses are latched via inputs A
on the falling edge of RAS#. Column (lower) addresses are latched via
inputs A
0-9
on the falling edge of CAS#. Row addresses must be latched before column addresses are latched.
2.
3.
4.
5.
6.
7.
8.
9.
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|---|---|
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| 28F020 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:28F020 2048K (256K X 8) CMOS FLASH MEMORY |
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