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Integrated Functions (
Continued
)
G
4.1.4.1
The scratchpad RAM is a dedicated high-speed memory
cache that contains BLT buffers, SMM header, and a
scratchpad area for display drivers. It provides both L1
cache performance and a dedicated resource that cannot
be thrown out by other system activity. The configuration
of the scratchpad is based on graphics resolution and is
described in Table 4-5.
Scratchpad Memory
The scratchpad memory is part of the on-chip L1 cache
memory. The memory size is controlled by bits in the GCR
register (Index B8h). The scratchpad memory can be dis-
abled, or sized to 2 KB, 3 KB, or 4 KB. The remaining L1
cache size is 16 KB minus the scratchpad size, and all of
the scratchpad area is subtracted from a single way.
The scratchpad memory is used by display drivers and
virtualization software. Because this resource must be
tightly controlled to avoid conflicts, application software
and third-party drivers should avoid accesses to the
scratchpad area.
The display driver creates and manages two BLT buffers
from within the scratchpad area. These BLT buffers are
used to transfer source data from system memory into the
frame buffer, or for destination data from system memory
or the frame buffer. The graphics pipeline accesses the
BLT buffers for many common operations, including Bit-
BLT transfers, output primitives, and raster text. Display
drivers also use a small portion of the scratchpad as an
extended register file, since scratchpad read and write
accesses are very fast compared to normal memory oper-
ations.
The virtualization software uses the scratchpad area to
store critical SMM information, including the SMI header
and SMM system state. No SMM code currently resides in
the scratchpad area, although this is an option for future
products.
When the BLT buffer pointer is used (refer to Table 4-8 on
page 99) addresses outside the scratchpad range will
wrap around back into the scratchpad RAM. Table 4-5
shows the allocation of scratchpad memory for the 2 KB
and 3 KB configurations of the scratchpad. The 2 KB con-
figuration uses GX_BASE+0800h to GX_BASE+1000h.
The 3 KB configuration uses GX_BASE+0400h to
GX_BASE+1000h. These configurations are fixed by the
system BIOS during boot and cannot be changed without
rebooting the system.
Table 4-5. Scratchpad Organization
2 KB Configuration
3 KB Configuration
Description
Offset
Size
Offset
Size
GX_BASE + 0EE0h
288 bytes
GX_BASE + 0EE0h
288 bytes
SMM scratchpad
GX_BASE + 0E60h
128 bytes
GX_BASE + 0E60h
128 bytes
Driver scratchpad
GX_BASE + 0B30h
816 bytes
GX_BASE + 0930h
1328 bytes
BLT Buffer 0
GX_BASE + 0800h
816 bytes
GX_BASE + 0400h
1328 bytes
BLT Buffer 1