HARDWARE
1-41
3802 GROUP USER’S MANUAL
FUNCTIONAL DESCRIPTION SUPPLEMENT
A-D Converter
A-D conversion is started by setting AD conversion
completion bit to “0.” During A-D conversion, inter-
nal operations are performed as follows.
1. After the start of A-D conversion, A-D conversion
register goes to “0016.”
2. The highest-order bit of A-D conversion register
is set to “1,” and the comparison voltage Vref is
input to the comparator. Then, Vref is compared
with analog input voltage VIN.
3. As a result of comparison, when Vref < VIN, the
highest-order bit of A-D conversion register be
comes “1.” When Vref > VIN, the highest-order
bit becomes “0.”
By repeating the above operations up to the lowest-
order bit of the A-D conversion register, an analog
value converts into a digital value.
A-D conversion completes at 50 clock cycles (12.5
s at f(XIN) = 8.0 MHz) after it is started, and the
result of the conversion is stored into the A-D con-
version register.
Concurrently with the completion of A-D conversion,
A-D conversion interrupt request occurs, so that the
AD conversion interrupt request bit is set to “1.”
Relative formula for a reference voltage VREF of A-D converter and Vref
When n = 0
Vref = 0
When n = 1 to 255
Vref =
! (n – 0.5)
n : the value of A-D converter (decimal numeral)
VREF
256
V1: A result of the first comparison
V3: A result of the third comparison
V5: A result of the fifth comparison
V7: A result of the seventh comparison
V2: A result of the second comparison
V4: A result of the fourth comparison
V6: A result of the sixth comparison
V8: A result of the eighth comparison
Table 11. Change of A-D conversion register during A-D conversion
At start of conversion
First comparison
Second comparison
Third comparison
After completion of eighth
comparison
1
000
0
10
000
0
100
000
0
000
0
A result of A-D conversion
V 1
V 1 V 2
VV
V
VV
V
1
2
3
4
5
678
Change of A-D conversion register
0
–
±
–
±
–
±
Value of comparison voltage (Vref)
VREF
2
4
512
2
4
512
8