參數(shù)資料
型號: 37C672
廠商: SMSC Corporation
英文描述: ENHANCED SUPER I/O CONTROLLER WITH FAST IR
中文描述: 增強(qiáng)的超級I / O控制器,快速紅外線
文件頁數(shù): 80/173頁
文件大?。?/td> 965K
代理商: 37C672
3802 GROUP USER’S MANUAL
3-44
APPENDIX
3.5 List of registers
Fig. 3.5.21 Structure of CPU mode register
Nothing is allocated for these bits. These are write disabled bits.
When these bits are read out, the values are “0.”
CPU mode register (CPUM) [Adress : 3B16]
CPU mode register
b7 b6 b5 b4 b3 b2 b1 b0
Function
At reset
RW
0
1
2
3
0
T
0
B
Name
Processor mode bits
00 : Single-chip mode
01 : Memory expansion mode
10 : Microprocessor mode
11 : Not available
Stack page selection bit
0 : 0 page
1 : 1 page
T An initial value of bit 1 is determined by a level of the CNVSS pin.
!
0
!
0
!
0
!
0
!
4
5
6
7
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