1-5
HARDWARE
3802 GROUP USER'S MANUAL
PIN DESCRIPTION
Pin
VCC, VSS
CNVSS
VREF
AVSS
RESET
XIN
XOUT
P00–P07
P10–P17
P20–P27
P30/DA1,
P31/DA2
P32–P37
P40/INT4,
P41/INT0,
P42/INT1,
P43/INT2
P44/RXD,
P45/TXD,
P46/SCLK1,
P47/SRDY1
P50/SIN2,
P51/SOUT2,
P52/SCLK2,
P53/SRDY2
P54/CNTR0,
P55/CNTR1
P56/PWM
P57/INT3
P60/AN0–
P67/AN7
Function
Apply voltage of 3.0 V–5.5 V to VCC, and 0 V to VSS.
(Extended operating temperature version : 4.0 V to 5.5 V)
This pin controls the operation mode of the chip.
Normally connected to VSS.
If this pin is connected to VCC, the internal ROM is inhibited and external memory is accessed.
Reference voltage input pin for A-D and D-A converters
GND input pin for A-D and D-A converters
Connect to VSS.
Reset input pin for active “L”
Input and output signals for the clock generating circuit.
Connect a ceramic resonator or quartz-crystal oscillator between the XIN and XOUT pins to set the
oscillation frequency.
If an external clock is used, connect the clock source to the XIN pin and leave the XOUT pin open.
The clock is used as the oscillating source of system clock.
8 bit CMOS I/O port
I/O direction register allows each pin to be individually programmed as either input or output.
At reset this port is set to input mode.
In modes other than single-chip, these pins are used as address, data, and control bus I/O pins.
CMOS compatible input level
CMOS 3-state output structure
8-bit CMOS I/O port with the same function as port P0
CMOS compatible input level
CMOS 3-state output structure
8-bit CMOS I/O port with the same function as port P0
CMOS compatible input level
CMOS 3-state output structure
8-bit CMOS I/O port with the same function as port P0
CMOS compatible input level
CMOS 3-state output structure
Function except a port function
D–A conversion output pins
External interrupt input pin
Serial I/O1 I/O pins
Serial I/O2 I/O pins
Timer X and Timer Y I/O pins
PWM output pin
External interrupt input pin
A-D conversion input pins
Name
Power source
CNVSS
Analog reference
voltage
Analog power
source
Reset input
Clock input
Clock output
I/O port P0
I/O port P1
I/O port P2
I/O port P3
I/O port P4
I/O port P5
I/O port P6
PIN DESCRIPTION
Table 1. Pin description