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7540 Group User’s Manual
3-85
APPENDIX
3.3.12 Notes on CPU mode register
(1) Switching method of CPU mode register after releasing reset
Switch the CPU mode register (CPUM) at the head of program after releasing reset in the following
method.
Fig. 3.3.4 Switching method of CPU mode register
(2) CPU mode register
Bits 5, 1 and 0 of CPU mode register are used to select oscillation mode and to control operation
modes of the microcomputer. In order to prevent the dead-lock by error-writing (ex. program run-
away), these bits can be rewritten only once after releasing reset. After rewriting it is disable to write
any data to the bit. (The emulator MCU “M37540RSS” is excluded.)
Also, when the read-modify-write instructions (SEB, CLB) are executed to bits 2 to 4, 6 and 7, bits
5, 1 and 0 are locked.
After releasing reset
Switch the oscillation mode
selection bit (bit 5 of CPUM)
Switch the clock division ratio
selection bits (bits 6 and 7 of CPUM)
Main routine
Start with a built-in ring oscillator (
Note
)
An initial value is set as a ceramic
oscillation mode. When it is switched to an
RC oscillation, its oscillation starts.
Select 1/1, 1/2, 1/8 or ring oscillator.
Wait by ring oscillator operation until
establishment of oscillator clock
When using a ceramic oscillation, wait until
establlishment of oscillation from oscillation starts.
When using an RC oscillation, wait time is not
required basically (time to execute the instruction to
switch from a ring oscillator meets the requirement).
Note
. After releasing reset the operation starts by starting a ring oscillator automatically.
Do not use a ring oscillator at ordinary operation.
3.3 Notes on use