82801BA ICH2
Datasheet
xiii
9
LPC Interface Bridge Registers (D31:F0)..................................................................9-1
9.1
PCI Configuration Registers (D31:F0)..........................................................9-1
9.1.1
VID—Vendor ID Register (LPC I/F—D31:F0)..................................9-2
9.1.2
DID—Device ID Register (LPC I/F—D31:F0) ..................................9-2
9.1.3
PCICMD—PCI COMMAND Register (LPC I/F—D31:F0)................9-3
9.1.4
PCISTS—PCI Device Status (LPC I/F—D31:F0) ............................9-4
9.1.5
REVID—Revision ID Register (LPC I/F—D31:F0)...........................9-4
9.1.6
PI—Programming Interface (LPC I/F—D31:F0) ..............................9-5
9.1.7
SCC—Sub-Class Code Register (LPC I/F—D31:F0) ......................9-5
9.1.8
BCC—Base-Class Code Register (LPC I/F—D31:F0) ....................9-5
9.1.9
HEADTYP—Header Type Register (LPC I/F—D31:F0) ..................9-5
9.1.10 PMBASE—ACPI Base Address (LPC I/F—D31:F0)........................9-6
9.1.11 ACPI_CNTL—ACPI Control (LPC I/F—D31:F0)..............................9-6
9.1.12 BIOS_CNTL (LPC I/F—D31:F0)......................................................9-7
9.1.13 TCO_CNTL—TCO Control (LPC I/F—D31:F0) ...............................9-7
9.1.14 GPIOBASE—GPIO Base Address (LPC I/F—D31:F0) ...................9-8
9.1.15 GPIO_CNTL—GPIO Control (LPC I/F—D31:F0) ............................9-8
9.1.16 PIRQ[n]_ROUT—PIRQ[A,B,C,D] Routing Control
(LPC I/F—D31:F0)...........................................................................9-8
9.1.17 SERIRQ_CNTL—Serial IRQ Control (LPC I/F—D31:F0)................9-9
9.1.18 PIRQ[n]_ROUT—PIRQ[E,F,G,H] Routing Control
(LPC I/F—D31:F0)...........................................................................9-9
9.1.19 D31_ERR_CFG—Device 31 Error Configuration Register
(LPC I/F—D31:F0).........................................................................9-10
9.1.20 D31_ERR_STS—Device 31 Error Status Register
(LPC I/F—D31:F0).........................................................................9-10
9.1.21 PCI_DMA_CFG—PCI DMA Configuration (LPC I/F—D31:F0) .....9-11
9.1.22 GEN_CNTL—General Control Register (LPC I/F—D31:F0) .........9-11
9.1.23 GEN_STS—General Status (LPC I/F—D31:F0)............................9-13
9.1.24 RTC_CONF—RTC Configuration Register (LPC I/F—D31:F0).....9-14
9.1.25 COM_DEC—LPC I/F Communication Port Decode Ranges
(LPC I/F—D31:F0).........................................................................9-14
9.1.26 FDD/LPT_DEC—LPC I/F FDD & LPT Decode Ranges
(LPC I/F—D31:F0).........................................................................9-15
9.1.27 SND_DEC—LPC I/F Sound Decode Ranges
(LPC I/F—D31:F0).........................................................................9-15
9.1.28 FWH_DEC_EN1—FWH Decode Enable 1 Register
(LPC I/F—D31:F0).........................................................................9-16
9.1.29 GEN1_DEC—LPC I/F Generic Decode Range 1
(LPC I/F—D31:F0).........................................................................9-17
9.1.30 LPC_EN—LPC I/F Enables (LPC I/F—D31:F0) ............................9-17
9.1.31 FWH_SEL1—FWH Select 1 Register (LPC I/F—D31:F0).............9-19
9.1.32 GEN2_DEC—LPC I/F Generic Decode Range 2
(LPC I/F—D31:F0).........................................................................9-20
9.1.33 FWH_SEL2—FWH Select 2 Register (LPC I/F—D31:F0).............9-20
9.1.34 FWH_DEC_EN2—FWH Decode Enable 2 Register
(LPC I/F—D31:F0).........................................................................9-21
9.1.35 FUNC_DIS—Function Disable Register (LPC I/F—D31:F0) .........9-22
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