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參數(shù)資料
| 型號： | A42MX16-3BG100 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 40MX and 42MX FPGA Families |
| 中文描述： | 40MX和42MX FPGA系列 |
| 文件頁數(shù)： | 11/120頁 |
| 文件大?。?/td> | 854K |
| 代理商： | A42MX16-3BG100 |
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108
4958B–AUTO–11/10
Atmel ATA6285/ATA6286 [Preliminary]
3.13.7.7
Timer3 Interrupt Mask Register – T3IMR
Bits 7..4 - Res: Reserved Bits
These bits are reserved bits at the ATA6289 and will always read as zero.
Bit 3 - T3CPIM: Timer3 CaPture Interrupt Mask Bit
When this bit is written to one, and the I-flag in the Status Register is set (one), the
Timer3/Counter3 Input Capture interrupt is enabled. The corresponding Interrupt Vector (see
Section 3.10 “Interrupts” on page 47) is executed when the T3ICF Flag, located in T3IFR, is set.
Bit 2 - T3CBIM: Timer3 Compare B Interrupt Mask Bit
When the T3CBIM bit is written to one and the I-bit in the Status Register is set (one), the
Timer3/Counter3 Compare Match B interrupt is enabled. The corresponding Interrupt Vector is
executed if a compare match in Timer3/Counter3 occurs and the T3COBF bit in the
Timer3/Counter3 Interrupt Flag Register (T3IFR) is set.
Bit 1 - T3CAIM: Timer3 Compare A Interrupt Mask Bit
When the T3CAIM bit is written to one and the I-bit in the Status Register is set (one), the
Timer3/Counter3 Compare Match A interrupt is enabled. The corresponding Interrupt Vector is
executed if a compare match in Timer3/Counter3 occurs and the T3COAF bit in the
Timer3/Counter3 Interrupt Flag Register (T3IFR) is set.
Bit 0 - T3OIM: Timer3 Overflow Interrupt Mask Bit
When the T3OIM bit is written to one and the I-bit in the Status Register is set (one), the
Timer3/Counter3 Overflow interrupt is enabled. The corresponding Interrupt Vector is executed
if an overflow in Timer3/Counter3 occurs and the T3OFF bit in the Timer3/Counter3 Interrupt
Flag Register (T3IFR) is set.
Bit
7
654
321
0
-
T3CPIM T3CBIM T3CAIM
T3OIM
T3IMR
Read/Write
R
R/W
Initial Value
0
001
000
0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| A42MX16-3PL100 | 40MX and 42MX FPGA Families |
| A42MX16-3PL100A | 40MX and 42MX FPGA Families |
| A42MX16-3PQ100A | 40MX and 42MX FPGA Families |
| A42MX16-3VQ100 | 40MX and 42MX FPGA Families |
| A42MX16-3VQ100A | 40MX and 42MX FPGA Families |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A42MX16-3BG100A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-3BG100B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-3BG100ES | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-3BG100I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-3BG100M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
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