參數(shù)資料
型號(hào): ADSP-TS203SABPZ050
廠商: Analog Devices Inc
文件頁(yè)數(shù): 45/48頁(yè)
文件大?。?/td> 0K
描述: IC PROCESSOR 500MHZ 576BGA
標(biāo)準(zhǔn)包裝: 1
系列: TigerSHARC®
類型: 定點(diǎn)/浮點(diǎn)
接口: 主機(jī)接口,連接端口,多處理器
時(shí)鐘速率: 500MHz
非易失內(nèi)存: 外部
芯片上RAM: 512kB
電壓 - 輸入/輸出: 2.50V
電壓 - 核心: 1.05V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 576-BBGA 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 576-BGA-ED(25x25)
包裝: 托盤(pán)
Rev. D
|
Page 6 of 48
|
May 2012
The host interface supports burst transactions initiated by a host
processor. After the host issues the starting address of the burst
and asserts the BRST signal, the processor increments the
address internally while the host continues to assert BRST.
The host interface provides a deadlock recovery mechanism that
enables a host to recover from deadlock situations involving the
processor. The BOFF signal provides the deadlock recovery
mechanism. When the host asserts BOFF, the processor backs
off the current transaction and asserts HBG and relinquishes the
external bus.
The host can directly read or write the internal memory of the
ADSP-TS203S processor, and it can access most of the proces-
sor registers, including DMA control (TCB) registers. Vector
interrupts support efficient execution of host commands.
Multiprocessor Interface
The processor offers powerful features tailored to multiprocess-
ing processor systems through the external port and link ports.
This multiprocessing capability provides the highest bandwidth
for interprocessor communication, including
Up to eight DSPs on a common bus
On-chip arbitration for glueless multiprocessing
Link ports for point-to-point communication
The external port and link ports provide integrated, glueless
multiprocessing support.
Figure 2. ADSP-TS203S Memory Map
RESERVED
I NTE RNAL REGISTERS (UREGS )
I NTERNAL MEMORY BLOCK 4
INTERNAL MEMORY BLO CK 2
INTERNAL MEMORY BLO CK 0
0x03FFFFFF
0x001E0000
0x001E03FF
0x000C7FFF
0x000C0000
0x00087FFF
0x00080000
0x00047FFF
0x00040000
0x00007FFF
0x00000000
INTERNAL SPACE
PROCESSO R ID 7
PROCESSO R ID 6
PROCESSO R ID 5
PROCESSO R ID 4
PROCESSO R ID 3
PROCESSO R ID 2
PROCESSO R ID 1
PROCESSO R ID 0
BROADCAST
HOST (
MSH)
BANK 1 (
MS1)
BANK 0 (
MS0)
MSSD BANK 0 (
MSSD0)
INTERNAL MEMORY
0x50000000
0x40000000
0x38000000
0x30000000
0x2C000000
0x28000000
0x24000000
0x20000000
0x1C000000
0x18000000
0x14000000
0x10000000
0x0C000000
0x03FFFFFF
0x00000000
GLOBAL SPACE
0xFFFFFFFF
M
U
L
T
IP
R
O
C
E
S
O
R
M
E
M
O
R
Y
S
P
A
C
E
X
T
E
R
N
A
L
M
E
M
O
R
Y
S
P
A
C
E
EACH IS A COPY
OF INTERNAL SPACE
RESERVED
I NTERNAL MEMORY BLOCK 6
RESERVED
SOC REGI STERS (UREGS)
0x001F0000
0x001F03FF
MSSD BANK 1 (
MSSD1)
MSSD BANK 2 (
MSSD2)
MSSD BANK 3 (
MSSD3)
0x60000000
0x70000000
0x80000000
RESERVED
0x54000000
0x44000000
0x64000000
0x74000000
RESERVED
RESE RVED
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