- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1908 > COP8CCR9KMT8 (National Semiconductor)IC MCU EEPROM 8BIT 32K 56-TSSOP PDF資料下載
參數(shù)資料
| 型號(hào)： | COP8CCR9KMT8 |
| 廠商： | National Semiconductor |
| 文件頁數(shù)： | 102/111頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU EEPROM 8BIT 32K 56-TSSOP |
| 標(biāo)準(zhǔn)包裝： | 34 |
| 系列： | COP8™ 8C |
| 核心處理器： | COP8 |
| 芯體尺寸： | 8-位 |
| 速度： | 20MHz |
| 連通性： | Microwire/Plus（SPI），UART/USART |
| 外圍設(shè)備： | 欠壓檢測(cè)/復(fù)位，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 49 |
| 程序存儲(chǔ)器容量： | 32KB（32K x 8） |
| 程序存儲(chǔ)器類型： | 閃存 |
| RAM 容量： | 1K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 16x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 56-TFSOP（0.240"，6.10mm 寬） |
| 包裝： | 管件 |
| 其它名稱： | *COP8CCR9KMT8 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁當(dāng)前第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁
SNOS535I – OCTOBER 2000 – REVISED MARCH 2013
Address
Contents(1)
S/ADD REG
xxFE
B Register
xxFF
S Register
0100 to 017F
On-Chip 128 RAM Bytes
0200 to 027F
On-Chip 128 RAM Bytes
0300 to 037F
On-Chip 128 RAM Bytes
0400 to 0047F
On-Chip 128 RAM Bytes
0500 to 057F
On-Chip 128 RAM Bytes
0600 to 067F
On-Chip 128 RAM Bytes
0700 to 077F
On-Chip 128 RAM Bytes
5.19 Instruction Set
5.19.1 INTRODUCTION
This section defines the instruction set of the COP8 Family members. It contains information about the
instruction set features, addressing modes and types.
5.19.2 INSTRUCTION FEATURES
The strength of the instruction set is based on the following features:
Mostly single-byte opcode instructions minimize program size.
One instruction cycle for the majority of single-byte instructions to minimize program execution time.
Many single-byte, multiple function instructions such as DRSZ.
Three memory mapped pointers: two for register indirect addressing, and one for the software stack.
Sixteen memory mapped registers that allow an optimized implementation of certain instructions.
Ability to set, reset, and test any individual bit in data memory address space, including the memory-
mapped I/O ports and registers.
Register-Indirect LOAD and EXCHANGE instructions with optional automatic post-incrementing or
decrementing of the register pointer. This allows for greater efficiency (both in cycle time and program
code) in loading, walking across and processing fields in data memory.
Unique instructions to optimize program size and throughput efficiency. Some of these instructions are:
DRSZ, IFBNE, DCOR, RETSK, VIS and RRC.
5.19.3 ADDRESSING MODES
The instruction set offers a variety of methods for specifying memory addresses. Each method is called an
addressing mode. These modes are classified into two categories: operand addressing modes and
transfer-of-control addressing modes. Operand addressing modes are the various methods of specifying
an address for accessing (reading or writing) data. Transfer-of-control addressing modes are used in
conjunction with jump instructions to control the execution sequence of the software program.
5.19.3.1 Operand Addressing Modes
The operand of an instruction specifies what memory location is to be affected by that instruction. Several
different operand addressing modes are available, allowing memory locations to be specified in a variety
of ways. An instruction can specify an address directly by supplying the specific address, or indirectly by
specifying a register pointer. The contents of the register (or in some cases, two registers) point to the
desired memory location. In the immediate mode, the data byte to be used is contained in the instruction
itself.
Each addressing mode has its own advantages and disadvantages with respect to flexibility, execution
speed, and program compactness. Not all modes are available with all instructions. The Load (LD)
instruction offers the largest number of addressing modes.
90
Functional Description
Copyright 2000–2013, Texas Instruments Incorporated
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| COP8SAA716M8/NOPB | IC MCU OTP 8BIT 1K 16-SOIC |
| CP2101-GMR | IC CTRLR BRIDGE USB-UART 28MLP |
| CP2103-GMR | IC CTRLR BRIDGE USB-UART 28MLP |
| CP2104-F03-GM | IC SGL USB-TO-UART BRIDGE 24QFN |
| CP2105-F01-GM | IC SGL USB-DL UART BRIDGE 24QFN |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| COP8CCR9LVA7 | 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| COP8CCR9LVA7/63 | 制造商:Texas Instruments 功能描述: |
| COP8CCR9LVA7/63SN | 功能描述:閃存 RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| COP8CCR9LVA7/NOPB | 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| COP8CCR9LVA763SN | 制造商:National Semiconductor 功能描述:MCU 8-bit COP8 CISC 32KB Flash 5V 68-Pin PLCC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。