參數(shù)資料
型號(hào): COP8CCR9KMT8
廠商: National Semiconductor
文件頁(yè)數(shù): 79/111頁(yè)
文件大?。?/td> 0K
描述: IC MCU EEPROM 8BIT 32K 56-TSSOP
標(biāo)準(zhǔn)包裝: 34
系列: COP8™ 8C
核心處理器: COP8
芯體尺寸: 8-位
速度: 20MHz
連通性: Microwire/Plus(SPI),UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 49
程序存儲(chǔ)器容量: 32KB(32K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 56-TFSOP(0.240",6.10mm 寬)
包裝: 管件
其它名稱: *COP8CCR9KMT8
SNOS535I – OCTOBER 2000 – REVISED MARCH 2013
Table 2-1. Pinouts for All Packages (continued)
In System
44-Pin
48-Pin
56-Pin
68-Pin
Port
Type
Alt. Fun
Emulation
44-Pin WQFN
PLCC
TSSOP
PLCC
Mode
A0
I/O
ADCH0
33
39
46
A1
I/O
ADCH1
34
40
47
A2
I/O
ADCH2
36
31
35
41
48
A3
I/O
ADCH3
37
32
36
42
49
A4
I/O
ADCH4
38
33
37
43
50
A5
I/O
ADCH5
39
34
38
44
51
A6
I/O
ADCH6
40
35
39
45
52
A7
I/O
ADCH7
41
36
40
46
53
B0
I/O
ADCH8
24
19
27
34
B1
I/O
ADCH9
25
20
28
35
B2
I/O
ADCH10
26
21
29
36
B3
I/O
ADCH11
27
22
30
37
B4
I/O
ADCH12
28
23
31
38
B5
I/O
ADCH13 or A/D MUX OUT
29
24
32
39
B6
I/O
ADCH14 or A/D MUX OUT
30
25
33
40
B7
I/O
ADCH15 or A/DIN
31
26
34
41
F0
I/O
7
F1
I/O
8
F2
I/O
9
F3
I/O
10
DVCC
VCC
35
30
32
38
17, 45
DGND
GND
32
27
35
16, 42
AVCC
34
29
31
37
44
AGND
33
28
36
43
CKI
I
15
10
15
RESET
I
RESET
6
1
66
2.3
Architectural Overview
This table assumes that the control flag MSEL is set.
2.3.1
EMI REDUCTION
This table assumes that the control flag MSEL is set.
The COP8CBR/CCR/CDR devices incorporate circuitry that guards against electromagnetic interference -
an increasing problem in today's microcontroller board designs. TI's patented EMI reduction technology
offers low EMI clock circuitry, gradual turn-on output drivers (GTOs) and internal Icc smoothing filters, to
help circumvent many of the EMI issues influencing embedded control designs. TI has achieved 15 dB–20
dB reduction in EMI transmissions when designs have incorporated its patented EMI reducing circuitry.
2.3.2
IN-SYSTEM PROGRAMMING AND VIRTUAL EEPROM
The
device
includes
a
program
in
a
boot
ROM
that
provides
the
capability,
through
the
MICROWIRE/PLUS serial interface, to erase, program and read the contents of the Flash memory.
Additional routines are included in the boot ROM, which can be called by the user program, to enable the
user to customize in system software update capability if MICROWIRE/PLUS is not desired.
Copyright 2000–2013, Texas Instruments Incorporated
Device Information
7
Product Folder Links: COP8CBR9 COP8CCR9 COP8CDR9
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