參數(shù)資料
型號： DS3112RD
廠商： Maxim Integrated Products, Inc.
英文描述： RECT BRIDGE GPP 15A 800V GBJ
中文描述： DS3/E3多路復(fù)用器參考設(shè)計
文件頁數(shù)： 100/135頁
文件大?。?/td> 585K
代理商： DS3112RD
DS3112
100 of 135
10. FEAC CONTROLLER
10.1 General Description
The DS3112 contains an onboard FEAC controller. When the device is operated in the T3 mode, the
FEAC controller is only active in the C-Bit Parity Mode. When the device is operated in the E3 mode, the
user has the option to connect the FEAC controller to the Sn bit position. On the receive side, the FEAC
controller is always connected to the receive E3 framer. If the host does not wish to use the FEAC
controller for the Sn bit, then the status updates provided by the FEAC controller are ignored. On the
transmit side, the host selects the source of the Sn via the E3SnC0 and E3SnC1 controls bits in the T3/E3
Control Register (Section 5.2).
The DS3112 can both detect and generate Far End Alarm Code Words (FEAC). The FEAC code word is
a repeating 16 bit pattern of the form ...0xxxxxx011111111... where the rightmost bit is transmitted first.
The FEAC code word must be transmitted at least 10 times. When no FEAC code word is being
transmitted, the data pattern should be forced to all ones.
The receive FEAC detector does a bit by bit search for a data pattern of the form of a FEAC code word.
Once found, the receive FEAC detector validates incoming code words by checking to see that the same
code word is found in three consecutive opportunities. Once validated, a code word is considered no
longer present when it is received incorrectly twice in a row. Once a code word is validated, the Receive
FEAC Code Word Detect (RFCD) status bit is set and the code word is written into the Receive FEAC
FIFO for the host to read. The host can use the RFCD status to know when to read the Receive FEAC
FIFO. The Receive FEAC FIFO is four code words deep. If the FIFO is full when the receive FEAC
detector attempts to write a new incoming code word, the latest incoming code word(s) will be discarded
and the Receive FEAC FIFO Overflow (RFFO) status bit will be set.
The DS3112 can transmit two different FEAC code words. This is useful if the host wishes to generate a
Loopback Command which is made up of 10 FEAC code words that indicate the type of loopback
followed by 10 FEAC code words that indicate which line is to be looped back.
10.2 FEAC CONTROL REGISTER DESCRIPTION
Register Name:
FCR
Register Description:
FEAC Control Register
Register Address:
90h
Bit #
7
6
5
4
Name
TFS1
TFS0
TFCA5
TFCA4
Default
0
0
0
0
Bit #
15
14
13
12
Name
RFR
IERFI
TFCB5
TFCB4
Default
0
-
0
0
Note:
Bits that are underlined are read-only; all other bits are read-write.
3
2
1
0
TFCA3
0
TFCA2
0
TFCA1
0
TFCA0
0
11
10
9
8
TFCB3
0
TFCB2
0
TFCB1
0
TFCB0
0
相關(guān)PDF資料
PDF描述
DS3134 Chateau Channelized T1 And E1 And HDLC Controller
DS3160 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
DS3171 Single/Dual/Triple/Quad DS3/E3 Single-Chip Transceivers
DS3171N Single/Dual/Triple/Quad DS3/E3 Single-Chip Transceivers
DS3172 Single/Dual/Triple/Quad DS3/E3 Single-Chip Transceivers
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS3116MP000 制造商:Thomas & Betts 功能描述:MAXGARD - RR8F
DS311X 功能描述:KWIK-CHG DESIGNATION STRIPS DBL RoHS:是 類別:盒，外殼，支架 >> 插線臺，插座面板 - 配件 系列:Kwik-Change® 標(biāo)準(zhǔn)包裝:50 系列:- 附件類型:模擬插頭，雙 樣式:耳機，0.173" 直徑 包括:-
DS312 功能描述:插線板 DESIGN STRIP COVER RoHS:否 制造商:Switchcraft 產(chǎn)品類型:Bantam (TT) 正規(guī)化: 高度/機架數(shù)量: 深度: 端接類型: 位置/觸點數(shù)量:48
DS-312 制造商:MA-COM 制造商全稱:M/A-COM Technology Solutions, Inc. 功能描述:Four-Way Power Divider, 10 - 500 MHz
DS312_09 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan-3E FPGA Family: Introduction and Ordering Information
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*