參數(shù)資料
型號(hào)： DS3112RD
廠商： Maxim Integrated Products, Inc.
英文描述： RECT BRIDGE GPP 15A 800V GBJ
中文描述： DS3/E3多路復(fù)用器參考設(shè)計(jì)
文件頁數(shù)： 60/135頁
文件大?。?/td> 585K
代理商： DS3112RD
DS3112
60 of 135
Bit12/Alarm Indication Signal Clear Detected (AISC).
This latched read-only event status bit will be
set to a one each time the T3/E3 framer no longer detects the AIS alarm state. This bit will be cleared
when read and will not be set again until the device once again exits the AIS alarm state. The AIS alarm
criteria is described in Tables 5.3A and 5.3B. This status bit is useful in helping the host determine if the
AIS persists as defined in ANSI T1.231.
Bit13/Remote Alarm Indication Clear Detected (RAIC).
This latched read-only event-status bit will
be set to a one each time the T3/E3 framer no longer detects the RAI alarm state. This bit will be cleared
when read and will not be set again until the device once again exits the RAI alarm state. The RAI alarm
criteria is described in Tables 5.3A and 5.3B. This status bit is useful in helping the host determine if the
RAI persists as defined in ANSI T1.231.
5.4 T3/E3 Performance Error Counters
There are six error counters in the DS3112. All of the errors counters are 16 bits in length. The host has
three options as to how these errors counters are updated. The device can be configured to automatically
update the counters once a second or manually via either an internal software bit (MECU) or an external
signal (FRMECU). See Section 4.2 for details. All the error counters saturate when full and will not
rollover.
Register Name:
BPVCR
Register Description:
BiPolar Violation Count Register
Register Address:
20h
Bit #
7
6
5
4
Name
BPV7
BPV6
BPV5
BPV4
Default
-
-
-
-
Bit #
15
14
13
12
Name
BPV15
BPV14
BPV13
BPV12
Default
-
-
-
-
Note:
Bits that are underlined are read-only; all other bits are read-write.
Bits 0 to 15/16-Bit BiPolar Violation Counter (BPV0 to BPV15).
These bits report the number of
BiPolar Violations (BPV). In the E3 Mode, this counter can also be configured via the E3CVE bit in the
T3E3 Control Register (Section 5.2) to count Code Violations (CV). A BPV is defined as consecutive
pulses (or marks) of the same polarity that are not part of a B3ZS/HDB3 code word. A CV is defined in
ITU O.161 as consecutive BPVs of the same polarity.
3
2
1
0
BPV3
-
BPV2
-
BPV1
-
BPV0
-
11
10
9
8
BPV11
-
BPV10
-
BPV9
-
BPV8
-
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