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參數(shù)資料
| 型號： | DS3112RD |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | RECT BRIDGE GPP 15A 800V GBJ |
| 中文描述： | DS3/E3多路復用器參考設計 |
| 文件頁數(shù)： | 127/135頁 |
| 文件大?。?/td> | 585K |
| 代理商： | DS3112RD |
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DS3112
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T2 OVERHEAD BIT ASSIGNMENTS
Table 14.2B
OVERHEAD BIT
M Bits
(M1/M2/M3)
all framing patterns, the M bits are fixed to a certain state (M1 = 0 / M2 = 1 /
M3 = 1).
F Bits
(F1/F2)
framing patterns, the F bits are fixed to a certain state (F1 = 0 / F2 = 1).
C Bits
(C1/C2/C3)
all three C Bits within a subframe are set to 1, then stuffing has occurred in the
stuff block of that subframe. If all three C Bits are set to zero, then no stuffing
has occurred. When the three C bits are not equal, a majority vote is used to
determine the true state. The exception to this rule is when the C3 bit is the
inverse of C1 and C2. When this occurs, it indicates that the T1 signal should
be looped back.
X Bit
(X = 0) when the T2 framer cannot synchronize. It will be set to a one (X = 1)
otherwise.
M12 Multiplexing
The M12 function multiplexes four T1 lines into a single T2 line. Since there are four M subframes in the
T2 framing structure, it might be concluded that each M subframe supports one T1 line but this is not the
case. The four T1 lines are bit interleaved into the T2 framing structure. A bit from T1 line #1 is placed
immediately after the overhead bit, followed by a bit from T1 line #2, which is followed by a bit from T1
line #3, which is followed by a bit from T1 line #4, and then the process repeats. Since there are 48
information bits in each block, there are 12 bits from each T1 line in a block. The second and fourth T1
lines are logically inverted before the bit interleaving occurs.
The four T1 lines are mapped asynchronously into the T2 data stream. This implies that there is no T1
framing information passed to the T2 level. The four T1 lines can have independent timing sources and
they do not need to be timing locked to the T2 clock. To account for differences in timing, bit stuffing is
used. The last block of each M subframe is the stuff block (Figure 14.2A). In each stuff block there is an
associated stuff bit (Figure 14.2B) that will be either an information bit (if the three C bits are decoded to
be a zero) or a stuff bit (if the three C bits are decoded to be a one). As shown in Figure 14.2B the
position of the stuff bit varies depending on the M subframe. This is done to allow a stuffing opportunity
to occur on each T1 line in every T2 M frame. For example, if the C bits in M Subframe 2 were all set to
one, then the second bit after the F2 overhead bit in the last block would be a stuff bit instead of an
information bit.
DESCRIPTION
The M bits provide the frame alignment pattern for the four M subframes. Like
The F bits provide the frame alignment pattern for the M frame. Like all
In the M12 application, the C bits are used to indicate when stuffing occurs. If
The X bit is used as a Remote Alarm Indication (RAI). It will be set to a zero
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