參數(shù)資料
型號: DS3112RD
廠商: Maxim Integrated Products, Inc.
英文描述: RECT BRIDGE GPP 15A 800V GBJ
中文描述: DS3/E3多路復(fù)用器參考設(shè)計
文件頁數(shù): 108/135頁
文件大?。?/td> 585K
代理商: DS3112RD
DS3112
108 of 135
Boundary Scan Register
This register contains both a shift register path and a latched parallel output for all control cells and
digital I/O cells and is 196 bits in length. Table 11.4A shows all of the cell bit locations and definitions.
BOUNDARY SCAN CONTROL BITS
Table 11.4A
BIT
SYMBOL
PIN
I/O OR CONTROL BIT
DESCRIPTION
0 = outputs are active
1 = outputs are 3-state ( “z” )
I
0 = CINT* is a zero ( “0” )
1 = CINT* is 3-state ( “z” )
O (open drain)
I
I
I
I
I
I
I
I
I
I
I
O
O
O
O
O
O
O
I
I
1 = FTSOF is an input
0 = FTSOF is an output
O
I
I
I
I
I
O
O
O
I
I
0
OUT_ENB
control
bit
C3
control
bit
A2
A2
B2
B3
C4
D5
A3
B4
C5
B6
C7
A7
C8
B8
A8
C9
B9
A9
C10
B10
A10
control
bit
A11
A11
C11
C12
A13
B13
A14
B14
C14
G19
G20
1
2
TEST
CINT_ENB_N
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
CINT_OUT
CINT_IN
CMS
CIM
CCS*
CRD*
CWR*
T3E3MS
RST*
G.747E
CALE
FRMECU
FRLOF
FRLOS
FRSOF
FRDEN
FRD
FRCLK
FTDEN
FTD
FTCLK
FTSOF_ENB_N
25
26
27
28
29
30
31
32
33
34
35
FTSOF_OUT
FTSOF_IN
FTMEI
HRNEG
HRCLK
HRPOS
HTNEG
HTCLK
HTPOS
LTCCLK
LRCCLK
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