755
SAM4CP [DATASHEET]
43051E–ATPL–08/14
Table 36-9
indicates the maximum length of a timeguard period that the transmitter can handle in relation to the function
of the baud rate.
36.6.3.11 Receiver Time-out
The Receiver Time-out provides support in handling variable-length frames. This feature detects an idle condition on the
RXD line. When a time-out is detected, the bit TIMEOUT in the US_CSR rises and can generate an interrupt, thus
indicating to the driver an end of frame.
The time-out delay period (during which the receiver waits for a new character) is programmed in the TO field of the
Receiver Time-out Register (US_RTOR). If the TO field is written to 0, the Receiver Time-out is disabled and no time-out
is detected. The TIMEOUT bit in the US_CSR remains at 0. Otherwise, the receiver loads a 16-bit counter with the value
programmed in TO. This counter is decremented at each bit period and reloaded each time a new character is received.
If the counter reaches 0, the TIMEOUT bit in US_CSR rises. Then, the user can either:
Stop the counter clock until a new character is received. This is performed by writing a one to the STTTO (Start
Time-out) bit in the US_CR. In this case, the idle state on RXD before a new character is received will not provide
a time-out. This prevents having to handle an interrupt before a character is received and allows waiting for the
next idle state on RXD after a frame is received.
Obtain an interrupt while no character is received. This is performed by writing a one to the RETTO (Reload and
Start Time-out) bit in the US_CR. If RETTO is performed, the counter starts counting down immediately from the
value TO. This enables generation of a periodic interrupt so that a user time-out can be handled, for example when
no key is pressed on a keyboard.
If STTTO is performed, the counter clock is stopped until a first character is received. The idle state on RXD before the
start of the frame does not provide a time-out. This prevents having to obtain a periodic interrupt and enables a wait of
the end of frame when the idle state on RXD is detected.
If RETTO is performed, the counter starts counting down immediately from the value TO. This enables generation of a
periodic interrupt so that a user time-out can be handled, for example when no key is pressed on a keyboard.
Figure 36-23
shows the block diagram of the Receiver Time-out feature.
Table 36-9.
Maximum Timeguard Length Depending on Baud Rate
Baud Rate (Bit/s)
Bit time (
μ
s)
Timeguard (ms)
1 200
833
212.50
9 600
104
26.56
14400
69.4
17.71
19200
52.1
13.28
28800
34.7
8.85
38400
26
6.63
56000
17.9
4.55
57600
17.4
4.43
115200
8.7
2.21