鈼�
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� EP1S30F780I6N
寤犲晢锛� Altera
鏂囦欢闋佹暩(sh霉)锛� 365/864闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC STRATIX FPGA 30K LE 780-FBGA
鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� Three Reasons to Use FPGA's in Industrial Designs
鐢�(ch菐n)鍝佽畩鍖栭€氬憡锛� Package Height Change 03/March/2008
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 18
绯诲垪锛� Stratix®
LAB/CLB鏁�(sh霉)锛� 3247
閭忚集鍏冧欢/鍠厓鏁�(sh霉)锛� 32470
RAM 浣嶇附瑷堬細 3317184
杓稿叆/杓稿嚭鏁�(sh霉)锛� 597
闆绘簮闆诲锛� 1.425 V ~ 1.575 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
宸ヤ綔婧害锛� -40°C ~ 100°C
灏佽/澶栨锛� 780-BBGA
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 780-FBGA锛�29x29锛�
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Altera Corporation
Section III鈥�3
I/O Standards
5
July 2005, v3.2
September 2004,
v3.1
鈼� Updated Note 3 in Table 5鈥�10 on page 5鈥�54.
鈼� Updated description of 鈥淩D Differential Termination鈥� on
鈼� Updated Note 5 in Table 5鈥�14 on page 5鈥�58.
鈼� Updated Notes 2, 5, and 7 in Table 5鈥�11 on page 5鈥�56
鈼� Added new text about spanning two I/O banks on
April 2004, v3.0
鈼� Updated notes for Figure 5鈥�17.
鈼� Updated Table 5鈥�7, 5鈥�8, and 5鈥�10.
鈼� 鈥淒ata Alignment with Clock鈥� section, last sentence: change
made from 90 degrees to 180 degrees.
November 2003,
v2.2
鈼� Removed support for series and parallel on-chip
termination.
鈼� Updated the number of channels per PLL in Tables 5-10
through 5-14.
October 2003,
v2.1
鈼� Added -8 speed grade device information, including Tables
5-7 and 5-8.
July 2003, v2.0
鈼� Format changes throughout Chapter.
鈼� Relaxed restriction of input pins next to differential pins for
flip chip packages in Figure 5-1, Note 5.
鈼� Wire bond package performance specification for 鈥渉igh鈥�
speed channels was increased to 624 Mbps from 462 Mbps
throughout Chapter.
鈼� Updated high-speed I/O specification for J=2 in Tables 5-7
and 5-8.
鈼� Updated Tables 5-10 to 5-14 to reflect PLL cross-bank
support for high-speed differential channels at full speed.
鈼� Increased maximum output clock frequency to 462 to 500
MHz on page 5-66.
Chapter
Date/Version
Changes Made
Comments
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
24LC02BT-I/MS IC EEPROM 2KBIT 400KHZ 8MSOP
EP1S30F780C5N IC STRATIX FPGA 30K LE 780-FBGA
24AA02T-I/MS IC EEPROM 2KBIT 400KHZ 8MSOP
EP2SGX60EF1152I4N IC STRATIX II GX 60K 1152-FBGA
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