參數(shù)資料
型號(hào): EWIXP460AC
廠商: INTEL CORP
元件分類: 微控制器/微處理器
英文描述: 400 MHz, RISC PROCESSOR, PBGA544
封裝: LEAD FREE, PLASTIC, BGA-544
文件頁數(shù): 129/163頁
文件大?。?/td> 1123K
代理商: EWIXP460AC
Package Information
May 2005
Intel IXP45X and Intel IXP46X Product Line of Network Processors Datasheet
68
Document Number: 306261-002
Table 16.
MII/SMII Interfaces (Sheet 1 of 8)
Name
Power
on
Reset
Normal
After
Reset
Until
Software
Enables
Normal
After
Software
Enables
Type
Description
ETHB_TXCLK /
SMII_CLK
ZVI
VI
I
MII Mode of Operation:
Externally supplied transmit clock.
25 MHz for 100 Mbps operation
2.5 MHz for 10 Mbps
This MAC interface does not contain hardware hashing capabilities local to the interface.
SMII Mode of Operation:
125-MHz input clock used as the reference clock when operating in SMII or Source Synchronous
SMII mode of operation.
When this interface/signal is enabled and is not being used in a system design, the interface/
signal should be pulled high with a 10-K
resistor.
ETHB_TXDATA[3:0] /
SMII_TXDATA[0] /
SMII_TXDATA[1] /
SMII_TXDATA[2] /
SMII_TXDATA[3]
Z
0
VO
O
MII Mode of Operation:
Transmit data bus to PHY, asserted synchronously with respect to ETHB_TXCLK. This MAC
interface does not contain hardware hashing capabilities local to the interface.
SMII Mode of Operation:
Each SMII_TXDATA line is an interface to a separate physical port.
ETHB_TXDATA[3] is multiplexed with SMII_TXDATA[3],
ETHB_TXDATA[2] is multiplexed with SMII_TXDATA[2],
ETHB_TXDATA[1] is multiplexed with SMII_TXDATA[1],
ETHB_TXDATA[0] is multiplexed with SMII_TXDATA[0]
The data on these signal are transmitted synchronously with respect to the rising edge of
SMII_CLK when operating as an SMII interface and synchronously with respect to the rising edge
of SMII_TXCLK when operating as a Source Synchronous SMII interface
NOTE:
This table discusses all features supported on the Intel IXP45X and Intel IXP46X Product Line of Network Processors. For details on feature support listed by processor,
For a legend of the Type codes, see Table 10 on page 46.
Please refer to Intel
IXP45X and Intel IXP46X Product Line of Network Processors Developer’s Manual for information on how to select the interface desired
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