參數(shù)資料
型號(hào): EWIXP460AC
廠商: INTEL CORP
元件分類: 微控制器/微處理器
英文描述: 400 MHz, RISC PROCESSOR, PBGA544
封裝: LEAD FREE, PLASTIC, BGA-544
文件頁數(shù): 34/163頁
文件大?。?/td> 1123K
代理商: EWIXP460AC
Electrical Specifications
Intel IXP45X and Intel IXP46X Product Line of Network Processors Datasheet
May 2005
Document Number: 306261-002
129
5.6.1.3
MII/SMII Clock Timings
5.6.1.4
UTOPIA Level 2 Clock Timings
5.6.1.5
Expansion Bus Clock Timings
Table 50.
MII/SMII Clock Timings
Symbol
Parameter
Min.
Nom.
Max.
Units
Notes
Tperiod100Mbit
Clock period for SMII_CLK
reference clock when operating in
SMII or Source Synchronous mode
of operation
88
ns
Tperiod100Mbit
Clock period for SMII_TXCLK and
SMII_RXCLK clock when operating
in Source Synchronous SMII mode
of operation
88
ns
Tperiod100Mbit
Clock period for Tx and Rx Ethernet
clocks
40
ns
Tperiod10Mbit
Clock period for Tx and Rx Ethernet
clocks
400
ns
Tduty
Duty cycle for Tx and Rx Ethernet
clocks
35
50
65
%
Trise/fall
Rise and fall time requirements for
Tx and Rx Ethernet clocks
2ns
Table 51.
UTOPIA Level 2 Clock Timings
Symbol
Parameter
Min.
Nom.
Max.
Units
Notes
Tperiod
Clock period for Tx and Rx UTOPIA Level 2
clocks
30.303
ns
Tduty
Duty cycle for Tx and Rx UTOPIA Level 2
clocks
40
50
60
%
Trise/fall
Rise and fall time requirements for Tx and
Rx UTOPIA Level 2 clocks
2ns
Table 52.
Expansion Bus Clock Timings
Symbol
Parameter
Min.
Nom.
Max.
Units
Notes
Tperiod
Clock period for expansion bus clock
12.5
ns
Tduty
Duty cycle for expansion bus clock
40
50
60
%
Trise/fall
Rise and fall time requirements for
expansion bus clock
2ns
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